Re: [PATCH 0/3] spi: SPI bus multiplexer

2019-05-01 Thread Mark Brown
On Sun, Apr 28, 2019 at 10:28:16PM +, Chris Packham wrote: > One other problem that I encounter is the interaction between cs-gpio > and SPI_MASTER_GPIO_SS. Having cs-gpio automatically sets SPI_CS_HIGH > which has the undesired side-effect that now my real chip select is > inverted. I

Re: [PATCH 0/3] spi: SPI bus multiplexer

2019-04-28 Thread Chris Packham
On 12/04/19 8:29 PM, Mark Brown wrote: > On Fri, Apr 12, 2019 at 05:02:10PM +1200, Chris Packham wrote: > >> Unfortunately recent changes have stopped my hacks from working. I've >> tried adapting cs-gpios to work with my particular hardware but I came >> to the realisation that the current

Re: [PATCH 0/3] spi: SPI bus multiplexer

2019-04-12 Thread Mark Brown
On Fri, Apr 12, 2019 at 05:02:10PM +1200, Chris Packham wrote: > Unfortunately recent changes have stopped my hacks from working. I've > tried adapting cs-gpios to work with my particular hardware but I came > to the realisation that the current cs-gpios support assumes a 1:1 > mapping of gpio to

[PATCH 0/3] spi: SPI bus multiplexer

2019-04-11 Thread Chris Packham
Hi All, I have a hardware design where a single SPI chip select is steered by a GPIO being asserted or de-asserted. On older kernels I was able to (ab)use a gpio-hog and cs-gpios to deal with this. Unfortunately recent changes have stopped my hacks from working. I've tried adapting cs-gpios to