Hi Daniel,
On 18.06.2014 18:17, Daniel Drake wrote:
> Hi Tomasz,
>
> On Tue, May 20, 2014 at 5:43 PM, Tomasz Figa wrote:
>> Since the block responsible for handling the pin is PMU, not CMU,
>> a separate driver, that binds to PMU node is required and acquires
>> all input clocks by standard DT
Hi Daniel,
On 18.06.2014 18:17, Daniel Drake wrote:
Hi Tomasz,
On Tue, May 20, 2014 at 5:43 PM, Tomasz Figa t.f...@samsung.com wrote:
Since the block responsible for handling the pin is PMU, not CMU,
a separate driver, that binds to PMU node is required and acquires
all input clocks by
Hi Tomasz,
On Tue, May 20, 2014 at 5:43 PM, Tomasz Figa wrote:
> Since the block responsible for handling the pin is PMU, not CMU,
> a separate driver, that binds to PMU node is required and acquires
> all input clocks by standard DT clock look-up. This way we don't need
> any cross-IP block
Hi Tomasz,
On Tue, May 20, 2014 at 5:43 PM, Tomasz Figa t.f...@samsung.com wrote:
Since the block responsible for handling the pin is PMU, not CMU,
a separate driver, that binds to PMU node is required and acquires
all input clocks by standard DT clock look-up. This way we don't need
any
On all Exynos SoCs there is a dedicated CLKOUT pin that allows many of
internal SoC clocks to be output from the SoC. The hardware structure
of CLKOUT related clocks looks as follows:
CMU |---> clock0 -> | PMU |
| |
On all Exynos SoCs there is a dedicated CLKOUT pin that allows many of
internal SoC clocks to be output from the SoC. The hardware structure
of CLKOUT related clocks looks as follows:
CMU |--- clock0 - | PMU |
| | |
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