Hello,
On Tue, 16 Aug 2016 14:14:47 +, Jason Cooper wrote:
> Patches 1-3 applied to irqchip/mvebu64. Patch 1 has Rob's Ack.
Great, thanks! Did you fix the driver for the minor nit that you
pointed out, or do you want a follow-up to fix that?
> I assume you'll route the dtsi change through
Hello,
On Tue, 16 Aug 2016 14:14:47 +, Jason Cooper wrote:
> Patches 1-3 applied to irqchip/mvebu64. Patch 1 has Rob's Ack.
Great, thanks! Did you fix the driver for the minor nit that you
pointed out, or do you want a follow-up to fix that?
> I assume you'll route the dtsi change through
Hi Thomas,
On Fri, Aug 05, 2016 at 04:55:17PM +0200, Thomas Petazzoni wrote:
> Hello,
>
> This small patch series intends to add support for the PMU of the
> Cortex-A72 cores found in the Marvell Armada 7K/8K SoCs.
>
> However, the interrupt of the PMU is not directly connected to the
> GIC,
Hi Thomas,
On Fri, Aug 05, 2016 at 04:55:17PM +0200, Thomas Petazzoni wrote:
> Hello,
>
> This small patch series intends to add support for the PMU of the
> Cortex-A72 cores found in the Marvell Armada 7K/8K SoCs.
>
> However, the interrupt of the PMU is not directly connected to the
> GIC,
Hello,
This small patch series intends to add support for the PMU of the
Cortex-A72 cores found in the Marvell Armada 7K/8K SoCs.
However, the interrupt of the PMU is not directly connected to the
GIC, but goes through a secondary interrupt controller called the
PIC. Therefore, this series
Hello,
This small patch series intends to add support for the PMU of the
Cortex-A72 cores found in the Marvell Armada 7K/8K SoCs.
However, the interrupt of the PMU is not directly connected to the
GIC, but goes through a secondary interrupt controller called the
PIC. Therefore, this series
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