Re: [PATCH 0/5] Threaded MSI interrupt for VFIO PCI device

2016-01-05 Thread Yunhong Jiang
On Wed, Dec 16, 2015 at 10:55:12PM +0100, Paolo Bonzini wrote: > > > On 16/12/2015 20:15, Alex Williamson wrote: > > The consumers would be, for instance, Intel PI + the threaded handler > > added in this series. These run independently, the PI bypass simply > > makes the interrupt disappear

Re: [PATCH 0/5] Threaded MSI interrupt for VFIO PCI device

2016-01-05 Thread Yunhong Jiang
On Wed, Dec 16, 2015 at 12:15:23PM -0700, Alex Williamson wrote: > On Wed, 2015-12-16 at 18:56 +0100, Paolo Bonzini wrote: > > Alex, > > > > can you take a look at the extension to the irq bypass interface in > > patch 2?  I'm not sure I understand what is the case where you have > > multiple

Re: [PATCH 0/5] Threaded MSI interrupt for VFIO PCI device

2016-01-05 Thread Yunhong Jiang
On Wed, Dec 16, 2015 at 10:55:12PM +0100, Paolo Bonzini wrote: > > > On 16/12/2015 20:15, Alex Williamson wrote: > > The consumers would be, for instance, Intel PI + the threaded handler > > added in this series. These run independently, the PI bypass simply > > makes the interrupt disappear

Re: [PATCH 0/5] Threaded MSI interrupt for VFIO PCI device

2016-01-05 Thread Yunhong Jiang
On Wed, Dec 16, 2015 at 12:15:23PM -0700, Alex Williamson wrote: > On Wed, 2015-12-16 at 18:56 +0100, Paolo Bonzini wrote: > > Alex, > > > > can you take a look at the extension to the irq bypass interface in > > patch 2?  I'm not sure I understand what is the case where you have > > multiple

Re: [PATCH 0/5] Threaded MSI interrupt for VFIO PCI device

2015-12-16 Thread Paolo Bonzini
On 16/12/2015 20:15, Alex Williamson wrote: > The consumers would be, for instance, Intel PI + the threaded handler > added in this series. These run independently, the PI bypass simply > makes the interrupt disappear from the host when it catches it, but if > the vCPU isn't running in the

Re: [PATCH 0/5] Threaded MSI interrupt for VFIO PCI device

2015-12-16 Thread Alex Williamson
On Wed, 2015-12-16 at 18:56 +0100, Paolo Bonzini wrote: > Alex, > > can you take a look at the extension to the irq bypass interface in > patch 2?  I'm not sure I understand what is the case where you have > multiple consumers for the same token. The consumers would be, for instance, Intel PI +

Re: [PATCH 0/5] Threaded MSI interrupt for VFIO PCI device

2015-12-16 Thread Paolo Bonzini
Alex, can you take a look at the extension to the irq bypass interface in patch 2? I'm not sure I understand what is the case where you have multiple consumers for the same token. Paolo On 03/12/2015 19:22, Yunhong Jiang wrote: > When assigning a VFIO device to a KVM guest with low latency

Re: [PATCH 0/5] Threaded MSI interrupt for VFIO PCI device

2015-12-16 Thread Paolo Bonzini
Alex, can you take a look at the extension to the irq bypass interface in patch 2? I'm not sure I understand what is the case where you have multiple consumers for the same token. Paolo On 03/12/2015 19:22, Yunhong Jiang wrote: > When assigning a VFIO device to a KVM guest with low latency

Re: [PATCH 0/5] Threaded MSI interrupt for VFIO PCI device

2015-12-16 Thread Alex Williamson
On Wed, 2015-12-16 at 18:56 +0100, Paolo Bonzini wrote: > Alex, > > can you take a look at the extension to the irq bypass interface in > patch 2?  I'm not sure I understand what is the case where you have > multiple consumers for the same token. The consumers would be, for instance, Intel PI +

Re: [PATCH 0/5] Threaded MSI interrupt for VFIO PCI device

2015-12-16 Thread Paolo Bonzini
On 16/12/2015 20:15, Alex Williamson wrote: > The consumers would be, for instance, Intel PI + the threaded handler > added in this series. These run independently, the PI bypass simply > makes the interrupt disappear from the host when it catches it, but if > the vCPU isn't running in the

Re: [PATCH 0/5] Threaded MSI interrupt for VFIO PCI device

2015-12-03 Thread Yunhong Jiang
On Thu, Dec 03, 2015 at 11:55:53AM -0700, Alex Williamson wrote: > On Thu, 2015-12-03 at 10:22 -0800, Yunhong Jiang wrote: > > When assigning a VFIO device to a KVM guest with low latency requirement, > > it > > is better to handle the interrupt in the hard interrupt context, to reduce > > the

Re: [PATCH 0/5] Threaded MSI interrupt for VFIO PCI device

2015-12-03 Thread Alex Williamson
On Thu, 2015-12-03 at 10:22 -0800, Yunhong Jiang wrote: > When assigning a VFIO device to a KVM guest with low latency requirement, it > is better to handle the interrupt in the hard interrupt context, to reduce > the context switch to/from the IRQ thread. > > Based on discussion on

[PATCH 0/5] Threaded MSI interrupt for VFIO PCI device

2015-12-03 Thread Yunhong Jiang
When assigning a VFIO device to a KVM guest with low latency requirement, it is better to handle the interrupt in the hard interrupt context, to reduce the context switch to/from the IRQ thread. Based on discussion on https://lkml.org/lkml/2015/10/26/764, the VFIO msi interrupt is changed to

Re: [PATCH 0/5] Threaded MSI interrupt for VFIO PCI device

2015-12-03 Thread Yunhong Jiang
On Thu, Dec 03, 2015 at 11:55:53AM -0700, Alex Williamson wrote: > On Thu, 2015-12-03 at 10:22 -0800, Yunhong Jiang wrote: > > When assigning a VFIO device to a KVM guest with low latency requirement, > > it > > is better to handle the interrupt in the hard interrupt context, to reduce > > the

Re: [PATCH 0/5] Threaded MSI interrupt for VFIO PCI device

2015-12-03 Thread Alex Williamson
On Thu, 2015-12-03 at 10:22 -0800, Yunhong Jiang wrote: > When assigning a VFIO device to a KVM guest with low latency requirement, it > is better to handle the interrupt in the hard interrupt context, to reduce > the context switch to/from the IRQ thread. > > Based on discussion on

[PATCH 0/5] Threaded MSI interrupt for VFIO PCI device

2015-12-03 Thread Yunhong Jiang
When assigning a VFIO device to a KVM guest with low latency requirement, it is better to handle the interrupt in the hard interrupt context, to reduce the context switch to/from the IRQ thread. Based on discussion on https://lkml.org/lkml/2015/10/26/764, the VFIO msi interrupt is changed to