On 1/6/2017 11:10 AM, Suman Anna wrote:
Hi Santosh,
OK. Its good to add the code at least with one active user of it.
Since this has to anyway wait for another merge window, please post the
users of it so that I can pull the combined patchset.
Are you going to post new patchset or you dropp
Hi Santosh,
>
> On 9/7/16 9:25 AM, Santosh Shilimkar wrote:
>> On 9/7/2016 9:22 AM, Suman Anna wrote:
>>> Hi Santosh,
>>>
>>> On 09/07/2016 11:11 AM, Santosh Shilimkar wrote:
Hi Suman,
On 9/1/2016 3:58 PM, Suman Anna wrote:
> Hi,
>
> The Keystone 2 family of SoCs have a
Hi Suman,
On 9/7/16 9:25 AM, Santosh Shilimkar wrote:
On 9/7/2016 9:22 AM, Suman Anna wrote:
Hi Santosh,
On 09/07/2016 11:11 AM, Santosh Shilimkar wrote:
Hi Suman,
On 9/1/2016 3:58 PM, Suman Anna wrote:
Hi,
The Keystone 2 family of SoCs have an on-chip RAM called the
Multicore Shared Memor
On 09/07/2016 11:25 AM, Santosh Shilimkar wrote:
> On 9/7/2016 9:22 AM, Suman Anna wrote:
>> Hi Santosh,
>>
>> On 09/07/2016 11:11 AM, Santosh Shilimkar wrote:
>>> Hi Suman,
>>>
>>> On 9/1/2016 3:58 PM, Suman Anna wrote:
Hi,
The Keystone 2 family of SoCs have an on-chip RAM called th
On 9/7/2016 9:22 AM, Suman Anna wrote:
Hi Santosh,
On 09/07/2016 11:11 AM, Santosh Shilimkar wrote:
Hi Suman,
On 9/1/2016 3:58 PM, Suman Anna wrote:
Hi,
The Keystone 2 family of SoCs have an on-chip RAM called the
Multicore Shared Memory (MSM) RAM. This RAM is accessible through
the Multicor
Hi Santosh,
On 09/07/2016 11:11 AM, Santosh Shilimkar wrote:
> Hi Suman,
>
> On 9/1/2016 3:58 PM, Suman Anna wrote:
>> Hi,
>>
>> The Keystone 2 family of SoCs have an on-chip RAM called the
>> Multicore Shared Memory (MSM) RAM. This RAM is accessible through
>> the Multicore Shared Memory Control
Hi Suman,
On 9/1/2016 3:58 PM, Suman Anna wrote:
Hi,
The Keystone 2 family of SoCs have an on-chip RAM called the
Multicore Shared Memory (MSM) RAM. This RAM is accessible through
the Multicore Shared Memory Controller (MSMC). This series represents
these on-chip RAMs as sram nodes so that the
Hi,
The Keystone 2 family of SoCs have an on-chip RAM called the
Multicore Shared Memory (MSM) RAM. This RAM is accessible through
the Multicore Shared Memory Controller (MSMC). This series represents
these on-chip RAMs as sram nodes so that the memory allocations
can be managed by the in-kernel m
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