[PATCH 0/6] x86: rework tlb range flushing code

Changes from v2: * Added a brief comment above the ceiling tunable * Updated the documentation to mention large pages and say "individual flush" instead of invlpg in most cases. Reposting with an instrumentation patch, and a few minor tweaks. I'd love some more eyeballs on this, but I think

[RFC][PATCH 0/6] x86: rework tlb range flushing code

I originally went to look at this becuase I realized that newer CPUs were not present in the intel_tlb_flushall_shift_set() code. I went to try to figure out where to stick newer CPUs (do we consider them more like SandyBridge or IvyBridge), and was not able to repeat the original experiments. In