Re: [PATCH 00/26] x86: 5-level paging enabling for v4.12

2017-03-13 Thread Ingo Molnar
* Kirill A. Shutemov wrote: > Kirill A. Shutemov (26): > x86: basic changes into headers for 5-level paging > x86: trivial portion of 5-level paging conversion > x86/gup: add 5-level paging support > x86/ident_map: add 5-level paging support > x86/mm: add support of p4d_t in vmalloc_fa

[PATCH 00/26] x86: 5-level paging enabling for v4.12

2017-03-12 Thread Kirill A. Shutemov
Here is v5 of 5-level paging patchset. Please review and consider applying. == Overview == x86-64 is currently limited to 256 TiB of virtual address space and 64 TiB of physical address space. We are already bumping into this limit: some vendors offers servers with 64 TiB of memory today. To ove