On Wed, 07 Jun 2017 10:40:50 PDT (-0700), Olof Johansson wrote:
> On Wed, Jun 7, 2017 at 10:09 AM, Wesley Terpstra wrote:
>>
>>
>> On Jun 7, 2017 7:26 AM, "Christoph Hellwig" wrote:
>>
>> On Tue, Jun 06, 2017 at 03:59:51PM -0700, Palmer Dabbelt wrote:
>>>
On Wed, 07 Jun 2017 10:40:50 PDT (-0700), Olof Johansson wrote:
> On Wed, Jun 7, 2017 at 10:09 AM, Wesley Terpstra wrote:
>>
>>
>> On Jun 7, 2017 7:26 AM, "Christoph Hellwig" wrote:
>>
>> On Tue, Jun 06, 2017 at 03:59:51PM -0700, Palmer Dabbelt wrote:
>>> From: "Wesley W. Terpstra"
>>>
>>>
On Wed, Jun 7, 2017 at 10:09 AM, Wesley Terpstra wrote:
>
>
> On Jun 7, 2017 7:26 AM, "Christoph Hellwig" wrote:
>
> On Tue, Jun 06, 2017 at 03:59:51PM -0700, Palmer Dabbelt wrote:
>> From: "Wesley W. Terpstra"
>>
>> There are RISC-V
On Wed, Jun 7, 2017 at 10:09 AM, Wesley Terpstra wrote:
>
>
> On Jun 7, 2017 7:26 AM, "Christoph Hellwig" wrote:
>
> On Tue, Jun 06, 2017 at 03:59:51PM -0700, Palmer Dabbelt wrote:
>> From: "Wesley W. Terpstra"
>>
>> There are RISC-V systems that have been mapped to Xilinx FPGAs that have
>>
On Tue, Jun 06, 2017 at 03:59:51PM -0700, Palmer Dabbelt wrote:
> From: "Wesley W. Terpstra"
>
> There are RISC-V systems that have been mapped to Xilinx FPGAs that have
> their PCIe controllers on chip. These build system changes allow RISC-V
> systems to enable the Xilinx
On Tue, Jun 06, 2017 at 03:59:51PM -0700, Palmer Dabbelt wrote:
> From: "Wesley W. Terpstra"
>
> There are RISC-V systems that have been mapped to Xilinx FPGAs that have
> their PCIe controllers on chip. These build system changes allow RISC-V
> systems to enable the Xilinx PCIe controller, and
CC pci folks
On Wed, Jun 7, 2017 at 12:59 AM, Palmer Dabbelt wrote:
> From: "Wesley W. Terpstra"
>
> There are RISC-V systems that have been mapped to Xilinx FPGAs that have
> their PCIe controllers on chip. These build system changes allow RISC-V
>
CC pci folks
On Wed, Jun 7, 2017 at 12:59 AM, Palmer Dabbelt wrote:
> From: "Wesley W. Terpstra"
>
> There are RISC-V systems that have been mapped to Xilinx FPGAs that have
> their PCIe controllers on chip. These build system changes allow RISC-V
> systems to enable the Xilinx PCIe
From: "Wesley W. Terpstra"
There are RISC-V systems that have been mapped to Xilinx FPGAs that have
their PCIe controllers on chip. These build system changes allow RISC-V
systems to enable the Xilinx PCIe controller, and to setup PCIe IRQs.
Signed-off-by: Palmer Dabbelt
From: "Wesley W. Terpstra"
There are RISC-V systems that have been mapped to Xilinx FPGAs that have
their PCIe controllers on chip. These build system changes allow RISC-V
systems to enable the Xilinx PCIe controller, and to setup PCIe IRQs.
Signed-off-by: Palmer Dabbelt
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