Re: [PATCH 02/20] powerpc/8xx: Map linear kernel RAM with 8M pages

2015-08-13 Thread Segher Boessenkool
On Wed, Aug 12, 2015 at 03:40:56PM +0200, Christophe Leroy wrote: > /* Insert level 1 index */ > rlwimi r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, > 29 > lwz r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)/* Get the > level 1 entry */ > + mtcr

Re: [PATCH 02/20] powerpc/8xx: Map linear kernel RAM with 8M pages

2015-08-13 Thread Segher Boessenkool
On Wed, Aug 12, 2015 at 03:40:56PM +0200, Christophe Leroy wrote: /* Insert level 1 index */ rlwimi r11, r10, 32 - ((PAGE_SHIFT - 2) 1), (PAGE_SHIFT - 2) 1, 29 lwz r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)/* Get the level 1 entry */ + mtcrr11 Maybe

[PATCH 02/20] powerpc/8xx: Map linear kernel RAM with 8M pages

2015-08-12 Thread Christophe Leroy
On a live running system (VoIP gateway for Air Trafic Control), over a 10 minutes period (with 277s idle), we get 87 millions DTLB misses and approximatly 35 secondes are spent in DTLB handler. This represents 5.8% of the overall time and even 10.8% of the non-idle time. Among those 87 millions

[PATCH 02/20] powerpc/8xx: Map linear kernel RAM with 8M pages

2015-08-12 Thread Christophe Leroy
On a live running system (VoIP gateway for Air Trafic Control), over a 10 minutes period (with 277s idle), we get 87 millions DTLB misses and approximatly 35 secondes are spent in DTLB handler. This represents 5.8% of the overall time and even 10.8% of the non-idle time. Among those 87 millions