Re: [PATCH 03/11] Documentation: mmc: sdhci-of-arasan: Add soc-ctl-syscon for corecfg regs

Hi, On Mon, Jun 13, 2016 at 1:18 AM, Shawn Lin wrote: > On 2016/6/8 6:44, Douglas Anderson wrote: >> >> As can be seen in Arasan's datasheet [1] there are several "corecfg" >> settings in their SDHCI IP Block that are supposed to be controlled by >> software. Although

Re: [PATCH 03/11] Documentation: mmc: sdhci-of-arasan: Add soc-ctl-syscon for corecfg regs

Hi, On Mon, Jun 13, 2016 at 1:18 AM, Shawn Lin wrote: > On 2016/6/8 6:44, Douglas Anderson wrote: >> >> As can be seen in Arasan's datasheet [1] there are several "corecfg" >> settings in their SDHCI IP Block that are supposed to be controlled by >> software. Although the datasheet referenced

Re: [PATCH 03/11] Documentation: mmc: sdhci-of-arasan: Add soc-ctl-syscon for corecfg regs

Am Montag, 13. Juni 2016, 16:18:24 schrieb Shawn Lin: > On 2016/6/8 6:44, Douglas Anderson wrote: > > As can be seen in Arasan's datasheet [1] there are several "corecfg" > > settings in their SDHCI IP Block that are supposed to be controlled by > > software. Although the datasheet referenced is

Re: [PATCH 03/11] Documentation: mmc: sdhci-of-arasan: Add soc-ctl-syscon for corecfg regs

Am Montag, 13. Juni 2016, 16:18:24 schrieb Shawn Lin: > On 2016/6/8 6:44, Douglas Anderson wrote: > > As can be seen in Arasan's datasheet [1] there are several "corecfg" > > settings in their SDHCI IP Block that are supposed to be controlled by > > software. Although the datasheet referenced is

Re: [PATCH 03/11] Documentation: mmc: sdhci-of-arasan: Add soc-ctl-syscon for corecfg regs

On 2016/6/8 6:44, Douglas Anderson wrote: As can be seen in Arasan's datasheet [1] there are several "corecfg" settings in their SDHCI IP Block that are supposed to be controlled by software. Although the datasheet referenced is a bit vague about how to access corecfg, in Figure 5 you can see

Re: [PATCH 03/11] Documentation: mmc: sdhci-of-arasan: Add soc-ctl-syscon for corecfg regs

On 2016/6/8 6:44, Douglas Anderson wrote: As can be seen in Arasan's datasheet [1] there are several "corecfg" settings in their SDHCI IP Block that are supposed to be controlled by software. Although the datasheet referenced is a bit vague about how to access corecfg, in Figure 5 you can see

Re: [PATCH 03/11] Documentation: mmc: sdhci-of-arasan: Add soc-ctl-syscon for corecfg regs

On Tue, Jun 07, 2016 at 03:44:36PM -0700, Douglas Anderson wrote: > As can be seen in Arasan's datasheet [1] there are several "corecfg" > settings in their SDHCI IP Block that are supposed to be controlled by > software. Although the datasheet referenced is a bit vague about how to > access

Re: [PATCH 03/11] Documentation: mmc: sdhci-of-arasan: Add soc-ctl-syscon for corecfg regs

On Tue, Jun 07, 2016 at 03:44:36PM -0700, Douglas Anderson wrote: > As can be seen in Arasan's datasheet [1] there are several "corecfg" > settings in their SDHCI IP Block that are supposed to be controlled by > software. Although the datasheet referenced is a bit vague about how to > access

[PATCH 03/11] Documentation: mmc: sdhci-of-arasan: Add soc-ctl-syscon for corecfg regs

As can be seen in Arasan's datasheet [1] there are several "corecfg" settings in their SDHCI IP Block that are supposed to be controlled by software. Although the datasheet referenced is a bit vague about how to access corecfg, in Figure 5 you can see that for Arasan's PHY (a separate component

[PATCH 03/11] Documentation: mmc: sdhci-of-arasan: Add soc-ctl-syscon for corecfg regs

As can be seen in Arasan's datasheet [1] there are several "corecfg" settings in their SDHCI IP Block that are supposed to be controlled by software. Although the datasheet referenced is a bit vague about how to access corecfg, in Figure 5 you can see that for Arasan's PHY (a separate component