Re: [PATCH 04/11] mmc: sunxi: Keep default timing phase settings for new timing mode

+stable On 14 July 2017 at 08:42, Chen-Yu Tsai wrote: > The register for the "new timing mode" also has bit fields for setting > output and sample timing phases. According to comments in Allwinner's > BSP kernel, the default values are good enough. > > Keep the default values already in the hardw

Re: [PATCH 04/11] mmc: sunxi: Keep default timing phase settings for new timing mode

On Fri, Jul 14, 2017 at 02:42:55PM +0800, Chen-Yu Tsai wrote: > The register for the "new timing mode" also has bit fields for setting > output and sample timing phases. According to comments in Allwinner's > BSP kernel, the default values are good enough. > > Keep the default values already in th

Re: [PATCH 04/11] mmc: sunxi: Keep default timing phase settings for new timing mode

On Fri, Jul 14, 2017 at 5:16 PM, Ulf Hansson wrote: > On 14 July 2017 at 08:42, Chen-Yu Tsai wrote: >> The register for the "new timing mode" also has bit fields for setting >> output and sample timing phases. According to comments in Allwinner's >> BSP kernel, the default values are good enough.

Re: [PATCH 04/11] mmc: sunxi: Keep default timing phase settings for new timing mode

On 14 July 2017 at 08:42, Chen-Yu Tsai wrote: > The register for the "new timing mode" also has bit fields for setting > output and sample timing phases. According to comments in Allwinner's > BSP kernel, the default values are good enough. > > Keep the default values already in the hardware when

[PATCH 04/11] mmc: sunxi: Keep default timing phase settings for new timing mode

The register for the "new timing mode" also has bit fields for setting output and sample timing phases. According to comments in Allwinner's BSP kernel, the default values are good enough. Keep the default values already in the hardware when setting new timing mode, instead of overwriting the whol