Allocate lm_root before the PAE roots so that the PAE roots aren't
leaked if the memory allocation for the lm_root happens to fail.
Note, KVM can _still_ leak PAE roots if mmu_check_root() fails on a
guest's PDPTR. That too will be fixed in a future commit.
Signed-off-by: Sean Christopherson <sea...@google.com>
---
arch/x86/kvm/mmu/mmu.c | 65 +++++++++++++++++++++---------------------
1 file changed, 32 insertions(+), 33 deletions(-)
diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c
index 1f129001a30c..e5c3701112f8 100644
--- a/arch/x86/kvm/mmu/mmu.c
+++ b/arch/x86/kvm/mmu/mmu.c
@@ -3292,21 +3292,39 @@ static int mmu_alloc_shadow_roots(struct kvm_vcpu *vcpu)
* the shadow page table may be a PAE or a long mode page table.
*/
pm_mask = PT_PRESENT_MASK;
- if (vcpu->arch.mmu->shadow_root_level == PT64_ROOT_4LEVEL) {
+ if (vcpu->arch.mmu->shadow_root_level == PT64_ROOT_4LEVEL)
pm_mask |= PT_ACCESSED_MASK | PT_WRITABLE_MASK | PT_USER_MASK;
- /*
- * Allocate the page for the PDPTEs when shadowing 32-bit NPT
- * with 64-bit only when needed. Unlike 32-bit NPT, it doesn't
- * need to be in low mem. See also lm_root below.
- */
- if (!vcpu->arch.mmu->pae_root) {
- WARN_ON_ONCE(!tdp_enabled);
+ /*
+ * When shadowing 32-bit or PAE NPT with 64-bit NPT, the PML4 and PDP
+ * tables are allocated and initialized at root creation as there is no
+ * equivalent level in the guest's NPT to shadow. Allocate the tables
+ * on demand, as running a 32-bit L1 VMM is very rare. Unlike 32-bit
+ * NPT, the PDP table doesn't need to be in low mem. Preallocate the
+ * pages so that the PAE roots aren't leaked on failure.
+ */
+ if (vcpu->arch.mmu->shadow_root_level == PT64_ROOT_4LEVEL &&
+ (!vcpu->arch.mmu->pae_root || !vcpu->arch.mmu->lm_root)) {
+ u64 *lm_root, *pae_root;
- vcpu->arch.mmu->pae_root = (void
*)get_zeroed_page(GFP_KERNEL_ACCOUNT);
- if (!vcpu->arch.mmu->pae_root)
- return -ENOMEM;
+ if (WARN_ON_ONCE(!tdp_enabled || vcpu->arch.mmu->pae_root ||
+ vcpu->arch.mmu->lm_root))
+ return -EIO;
+
+ pae_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT);
+ if (!pae_root)
+ return -ENOMEM;
+
+ lm_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT);
+ if (!lm_root) {
+ free_page((unsigned long)pae_root);
+ return -ENOMEM;
}
+
+ vcpu->arch.mmu->pae_root = pae_root;
+ vcpu->arch.mmu->lm_root = lm_root;
+
+ lm_root[0] = __pa(vcpu->arch.mmu->pae_root) | pm_mask;
}
for (i = 0; i < 4; ++i) {
@@ -3327,30 +3345,11 @@ static int mmu_alloc_shadow_roots(struct kvm_vcpu *vcpu)
PT32_ROOT_LEVEL, false);
vcpu->arch.mmu->pae_root[i] = root | pm_mask;
}
- vcpu->arch.mmu->root_hpa = __pa(vcpu->arch.mmu->pae_root);
-
- /*
- * When shadowing 32-bit or PAE NPT with 64-bit NPT, the PML4 and PDP
- * tables are allocated and initialized at MMU creation as there is no
- * equivalent level in the guest's NPT to shadow. Allocate the tables
- * on demand, as running a 32-bit L1 VMM is very rare. The PDP is
- * handled above (to share logic with PAE), deal with the PML4 here.
- */
- if (vcpu->arch.mmu->shadow_root_level == PT64_ROOT_4LEVEL) {
- if (vcpu->arch.mmu->lm_root == NULL) {
- u64 *lm_root;
-
- lm_root = (void*)get_zeroed_page(GFP_KERNEL_ACCOUNT);
- if (!lm_root)
- return -ENOMEM;
-
- lm_root[0] = __pa(vcpu->arch.mmu->pae_root) | pm_mask;
-
- vcpu->arch.mmu->lm_root = lm_root;
- }
+ if (vcpu->arch.mmu->shadow_root_level == PT64_ROOT_4LEVEL)
vcpu->arch.mmu->root_hpa = __pa(vcpu->arch.mmu->lm_root);
- }
+ else
+ vcpu->arch.mmu->root_hpa = __pa(vcpu->arch.mmu->pae_root);
set_root_pgd:
vcpu->arch.mmu->root_pgd = root_pgd;
--
2.30.1.766.gb4fecdf3b7-goog
