On 08/04/2021 11:13, Chunfeng Yun wrote:
On Wed, 2021-04-07 at 00:24 +0530, Pratyush Yadav wrote:
On 31/03/21 05:24PM, Chunfeng Yun wrote:
On Tue, 2021-03-30 at 23:03 +0530, Pratyush Yadav wrote:
Some platforms like TI's J721E can have the CSI2RX paired with an
external DPHY. Add support to
On Wed, 2021-04-07 at 00:24 +0530, Pratyush Yadav wrote:
> On 31/03/21 05:24PM, Chunfeng Yun wrote:
> > On Tue, 2021-03-30 at 23:03 +0530, Pratyush Yadav wrote:
> > > Some platforms like TI's J721E can have the CSI2RX paired with an
> > > external DPHY. Add support to enable and configure the DPHY
On 31/03/21 05:24PM, Chunfeng Yun wrote:
> On Tue, 2021-03-30 at 23:03 +0530, Pratyush Yadav wrote:
> > Some platforms like TI's J721E can have the CSI2RX paired with an
> > external DPHY. Add support to enable and configure the DPHY using the
> > generic PHY framework.
> >
> > Get the pixel rate
On Tue, 2021-03-30 at 23:03 +0530, Pratyush Yadav wrote:
> Some platforms like TI's J721E can have the CSI2RX paired with an
> external DPHY. Add support to enable and configure the DPHY using the
> generic PHY framework.
>
> Get the pixel rate and bpp from the subdev and pass them on to the DPHY
Some platforms like TI's J721E can have the CSI2RX paired with an
external DPHY. Add support to enable and configure the DPHY using the
generic PHY framework.
Get the pixel rate and bpp from the subdev and pass them on to the DPHY
along with the number of lanes. All other settings are left to
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