Hi Arnd,
On Wednesday 07 May 2014 03:00 PM, Arnd Bergmann wrote:
> On Wednesday 07 May 2014 14:14:55 Kishon Vijay Abraham I wrote:
+static void dra7xx_pcie_enable_interrupts(struct pcie_port *pp)
+{
+struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pp);
+
+
> > + writel(value, base + offset);
> > +}
> > +
> > +static int dra7xx_pcie_link_up(struct pcie_port *pp)
> > +{
> > + struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pp);
> > + u32 reg = dra7xx_pcie_readl(dra7xx->base, PCIECTRL_DRA7XX_CONF_PHY_CS);
> > +
> > + if (reg & LINK_UP)
> > +
+ writel(value, base + offset);
+}
+
+static int dra7xx_pcie_link_up(struct pcie_port *pp)
+{
+ struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pp);
+ u32 reg = dra7xx_pcie_readl(dra7xx-base, PCIECTRL_DRA7XX_CONF_PHY_CS);
+
+ if (reg LINK_UP)
+ return true;
+
Hi Arnd,
On Wednesday 07 May 2014 03:00 PM, Arnd Bergmann wrote:
On Wednesday 07 May 2014 14:14:55 Kishon Vijay Abraham I wrote:
+static void dra7xx_pcie_enable_interrupts(struct pcie_port *pp)
+{
+struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pp);
+
+dra7xx_pcie_writel(dra7xx-base,
On Thursday 08 May 2014 17:56:38 Jingoo Han wrote:
> On Wednesday, May 07, 2014 6:26 PM, Arnd Bergmann wrote:
> > On Wednesday 07 May 2014 14:52:47 Kishon Vijay Abraham I wrote:
> > > On Tuesday 06 May 2014 10:05 PM, Jason Gunthorpe wrote:
> > > > On Tue, May 06, 2014 at 07:03:51PM +0530, Kishon
On Wednesday, May 07, 2014 6:26 PM, Arnd Bergmann wrote:
> On Wednesday 07 May 2014 14:52:47 Kishon Vijay Abraham I wrote:
> > On Tuesday 06 May 2014 10:05 PM, Jason Gunthorpe wrote:
> > > On Tue, May 06, 2014 at 07:03:51PM +0530, Kishon Vijay Abraham I wrote:
> > >> +Example:
> > >>
On Wednesday, May 07, 2014 6:26 PM, Arnd Bergmann wrote:
On Wednesday 07 May 2014 14:52:47 Kishon Vijay Abraham I wrote:
On Tuesday 06 May 2014 10:05 PM, Jason Gunthorpe wrote:
On Tue, May 06, 2014 at 07:03:51PM +0530, Kishon Vijay Abraham I wrote:
+Example:
+pcie@5100 {
+
On Thursday 08 May 2014 17:56:38 Jingoo Han wrote:
On Wednesday, May 07, 2014 6:26 PM, Arnd Bergmann wrote:
On Wednesday 07 May 2014 14:52:47 Kishon Vijay Abraham I wrote:
On Tuesday 06 May 2014 10:05 PM, Jason Gunthorpe wrote:
On Tue, May 06, 2014 at 07:03:51PM +0530, Kishon Vijay
On Wednesday 07 May 2014 14:14:55 Kishon Vijay Abraham I wrote:
> >> +static void dra7xx_pcie_enable_interrupts(struct pcie_port *pp)
> >> +{
> >> +struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pp);
> >> +
> >> +dra7xx_pcie_writel(dra7xx->base, PCIECTRL_DRA7XX_CONF_IRQSTATUS_MAIN,
> >> +
On Wednesday 07 May 2014 14:52:47 Kishon Vijay Abraham I wrote:
> On Tuesday 06 May 2014 10:05 PM, Jason Gunthorpe wrote:
> > On Tue, May 06, 2014 at 07:03:51PM +0530, Kishon Vijay Abraham I wrote:
> >> +Example:
> >> +pcie@5100 {
> >> +compatible = "ti,dra7xx-pcie";
> >> +reg =
Hi,
On Tuesday 06 May 2014 10:05 PM, Jason Gunthorpe wrote:
> On Tue, May 06, 2014 at 07:03:51PM +0530, Kishon Vijay Abraham I wrote:
>> +Example:
>> +pcie@5100 {
>> +compatible = "ti,dra7xx-pcie";
>> +reg = <0x51002000 0x14c>, <0x5100 0x2000>;
>> +reg-names = "ti_conf",
Hi,
On Tuesday 06 May 2014 07:24 PM, Arnd Bergmann wrote:
> On Tuesday 06 May 2014 19:03:51 Kishon Vijay Abraham I wrote:
>> Added support for pcie controller in dra7xx. This driver re-uses
>> the designware core code that is already present in kernel.
>>
>> Cc: Bjorn Helgaas
>> Cc: Mohit Kumar
Hi,
On Tuesday 06 May 2014 07:14 PM, Marek Vasut wrote:
> On Tuesday, May 06, 2014 at 03:33:51 PM, Kishon Vijay Abraham I wrote:
>> Added support for pcie controller in dra7xx. This driver re-uses
>> the designware core code that is already present in kernel.
>
> [...]
>
>> +#define
Hi,
On Tuesday 06 May 2014 07:14 PM, Marek Vasut wrote:
On Tuesday, May 06, 2014 at 03:33:51 PM, Kishon Vijay Abraham I wrote:
Added support for pcie controller in dra7xx. This driver re-uses
the designware core code that is already present in kernel.
[...]
+#define to_dra7xx_pcie(x)
Hi,
On Tuesday 06 May 2014 07:24 PM, Arnd Bergmann wrote:
On Tuesday 06 May 2014 19:03:51 Kishon Vijay Abraham I wrote:
Added support for pcie controller in dra7xx. This driver re-uses
the designware core code that is already present in kernel.
Cc: Bjorn Helgaas bhelg...@google.com
Cc:
Hi,
On Tuesday 06 May 2014 10:05 PM, Jason Gunthorpe wrote:
On Tue, May 06, 2014 at 07:03:51PM +0530, Kishon Vijay Abraham I wrote:
+Example:
+pcie@5100 {
+compatible = ti,dra7xx-pcie;
+reg = 0x51002000 0x14c, 0x5100 0x2000;
+reg-names = ti_conf, rc_dbics;
+
On Wednesday 07 May 2014 14:52:47 Kishon Vijay Abraham I wrote:
On Tuesday 06 May 2014 10:05 PM, Jason Gunthorpe wrote:
On Tue, May 06, 2014 at 07:03:51PM +0530, Kishon Vijay Abraham I wrote:
+Example:
+pcie@5100 {
+compatible = ti,dra7xx-pcie;
+reg = 0x51002000 0x14c,
On Wednesday 07 May 2014 14:14:55 Kishon Vijay Abraham I wrote:
+static void dra7xx_pcie_enable_interrupts(struct pcie_port *pp)
+{
+struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pp);
+
+dra7xx_pcie_writel(dra7xx-base, PCIECTRL_DRA7XX_CONF_IRQSTATUS_MAIN,
+
On Tue, May 06, 2014 at 07:03:51PM +0530, Kishon Vijay Abraham I wrote:
> +Example:
> +pcie@5100 {
> + compatible = "ti,dra7xx-pcie";
> + reg = <0x51002000 0x14c>, <0x5100 0x2000>;
> + reg-names = "ti_conf", "rc_dbics";
> + interrupts = <0 232 0x4>, <0 233 0x4>;
> +
On Tuesday 06 May 2014 19:03:51 Kishon Vijay Abraham I wrote:
> Added support for pcie controller in dra7xx. This driver re-uses
> the designware core code that is already present in kernel.
>
> Cc: Bjorn Helgaas
> Cc: Mohit Kumar
> Cc: Jingoo Han
> Cc: Marek Vasut
> Signed-off-by: Kishon
On Tuesday, May 06, 2014 at 03:33:51 PM, Kishon Vijay Abraham I wrote:
> Added support for pcie controller in dra7xx. This driver re-uses
> the designware core code that is already present in kernel.
[...]
> +#define to_dra7xx_pcie(x)container_of((x), struct dra7xx_pcie, pp)
> +
> +static
Added support for pcie controller in dra7xx. This driver re-uses
the designware core code that is already present in kernel.
Cc: Bjorn Helgaas
Cc: Mohit Kumar
Cc: Jingoo Han
Cc: Marek Vasut
Signed-off-by: Kishon Vijay Abraham I
---
Documentation/devicetree/bindings/pci/ti-pci.txt | 33 ++
Added support for pcie controller in dra7xx. This driver re-uses
the designware core code that is already present in kernel.
Cc: Bjorn Helgaas bhelg...@google.com
Cc: Mohit Kumar mohit.ku...@st.com
Cc: Jingoo Han jg1@samsung.com
Cc: Marek Vasut ma...@denx.de
Signed-off-by: Kishon Vijay
On Tuesday, May 06, 2014 at 03:33:51 PM, Kishon Vijay Abraham I wrote:
Added support for pcie controller in dra7xx. This driver re-uses
the designware core code that is already present in kernel.
[...]
+#define to_dra7xx_pcie(x)container_of((x), struct dra7xx_pcie, pp)
+
+static inline
On Tuesday 06 May 2014 19:03:51 Kishon Vijay Abraham I wrote:
Added support for pcie controller in dra7xx. This driver re-uses
the designware core code that is already present in kernel.
Cc: Bjorn Helgaas bhelg...@google.com
Cc: Mohit Kumar mohit.ku...@st.com
Cc: Jingoo Han
On Tue, May 06, 2014 at 07:03:51PM +0530, Kishon Vijay Abraham I wrote:
+Example:
+pcie@5100 {
+ compatible = ti,dra7xx-pcie;
+ reg = 0x51002000 0x14c, 0x5100 0x2000;
+ reg-names = ti_conf, rc_dbics;
+ interrupts = 0 232 0x4, 0 233 0x4;
+ #address-cells = 3;
+
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