[PATCH 06/10] arm64: tegra: Add P2U and PCIe controller nodes to Tegra194 DT

Add P2U (PIPE to UPHY) and PCIe controller nodes to device tree. The Tegra194 SoC contains six PCIe controllers and twenty P2U instances grouped into two different PHY bricks namely High-Speed IO (HSIO-12 P2Us) and NVIDIA High Speed (NVHS-8 P2Us) respectively. Signed-off-by: Vidya Sagar --- arch

Re: [PATCH 06/10] arm64: tegra: Add P2U and PCIe controller nodes to Tegra194 DT

On Tue, Mar 26, 2019 at 08:43:23PM +0530, Vidya Sagar wrote: > Add P2U (PIPE to UPHY) and PCIe controller nodes to device tree. > The Tegra194 SoC contains six PCIe controllers and twenty P2U instances > grouped into two different PHY bricks namely High-Speed IO (HSIO-12 P2Us) > and NVIDIA High Spe

Re: [PATCH 06/10] arm64: tegra: Add P2U and PCIe controller nodes to Tegra194 DT

On 3/28/2019 10:29 PM, Thierry Reding wrote: On Tue, Mar 26, 2019 at 08:43:23PM +0530, Vidya Sagar wrote: Add P2U (PIPE to UPHY) and PCIe controller nodes to device tree. The Tegra194 SoC contains six PCIe controllers and twenty P2U instances grouped into two different PHY bricks namely High-Spe