Hybrid FPRs is a scheme where scalar FP registers are 64b wide, but
accesses to odd indexed single registers use bits 63:32 of the
preceeding even indexed 64b register. In this mode all FP code
except that built for the plain FP64 ABI can execute correctly. Most
notably a combination of FP64A & FP3
Hi,
On Thu, Sep 11, 2014 at 08:30:20AM +0100, Paul Burton wrote:
> Hybrid FPRs is a scheme where scalar FP registers are 64b wide, but
> accesses to odd indexed single registers use bits 63:32 of the
> preceeding even indexed 64b register. In this mode all FP code
> except that built for the plain
On Wed, Dec 24, 2014 at 01:21:11AM +0200, Aaro Koskinen wrote:
> Hi,
>
> On Thu, Sep 11, 2014 at 08:30:20AM +0100, Paul Burton wrote:
> > Hybrid FPRs is a scheme where scalar FP registers are 64b wide, but
> > accesses to odd indexed single registers use bits 63:32 of the
> > preceeding even index
Hi,
On Tue, Dec 23, 2014 at 11:31:54PM +, James Hogan wrote:
> On Wed, Dec 24, 2014 at 01:21:11AM +0200, Aaro Koskinen wrote:
> > On Thu, Sep 11, 2014 at 08:30:20AM +0100, Paul Burton wrote:
> > > Hybrid FPRs is a scheme where scalar FP registers are 64b wide, but
> > > accesses to odd indexed
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