On Thu, Feb 04, 2021, Paolo Bonzini wrote:
> On 04/02/21 18:52, Sean Christopherson wrote:
> > > Alternatively there could be something like a is_rsvd_cr3_bits() helper
> > > that
> > > just uses reserved_gpa_bits for now. Probably put the comment in the wrong
> > > place. It's a minor point in a
On 04/02/21 18:52, Sean Christopherson wrote:
Alternatively there could be something like a is_rsvd_cr3_bits() helper that
just uses reserved_gpa_bits for now. Probably put the comment in the wrong
place. It's a minor point in any case.
That thought crossed my mind, too. Maybe kvm_vcpu_is_ille
On Thu, Feb 04, 2021, Edgecombe, Rick P wrote:
> On Thu, 2021-02-04 at 11:34 +0100, Paolo Bonzini wrote:
> > On 04/02/21 03:19, Sean Christopherson wrote:
> > > Ah, took me a few minutes, but I see what you're saying. LAM will
> > > introduce
> > > bits that are repurposed for CR3, but not generic
On Thu, 2021-02-04 at 11:34 +0100, Paolo Bonzini wrote:
> On 04/02/21 03:19, Sean Christopherson wrote:
> > Ah, took me a few minutes, but I see what you're saying. LAM will
> > introduce
> > bits that are repurposed for CR3, but not generic GPAs. And, the
> > behavior is
> > based on CPU support
On 04/02/21 03:19, Sean Christopherson wrote:
Ah, took me a few minutes, but I see what you're saying. LAM will introduce
bits that are repurposed for CR3, but not generic GPAs. And, the behavior is
based on CPU support, so it'd make sense to have a mask cached in vcpu->arch
as opposed to const
On Thu, Feb 04, 2021, Edgecombe, Rick P wrote:
> On Wed, 2021-02-03 at 16:01 -0800, Sean Christopherson wrote:
> >
> > - unsigned long cr3_lm_rsvd_bits;
> > + u64 reserved_gpa_bits;
>
> LAM defines bits above the GFN in CR3:
> https://software.intel.com/content/www/us/en/develop/down
On Wed, 2021-02-03 at 16:01 -0800, Sean Christopherson wrote:
>
> - unsigned long cr3_lm_rsvd_bits;
> + u64 reserved_gpa_bits;
LAM defines bits above the GFN in CR3:
https://software.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programmin
Rename cr3_lm_rsvd_bits to reserved_gpa_bits, and use it for all GPA
legality checks. AMD's APM states:
If the C-bit is an address bit, this bit is masked from the guest
physical address when it is translated through the nested page tables.
Thus, any access that can conceivably be run throug
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