Re: [PATCH 08/17] dts: include documentation for the RISC-V interrupt controllers

2017-06-19 Thread Mark Rutland
On Fri, Jun 09, 2017 at 02:58:14PM -0700, Wesley Terpstra wrote: > Ugh. Clicked reply without being done writing the reply! > > On Thu, Jun 8, 2017 at 3:52 AM, Mark Rutland wrote: > > Edge vs level, active high vs active low. Typically some of these are > > programmable,

Re: [PATCH 08/17] dts: include documentation for the RISC-V interrupt controllers

2017-06-19 Thread Mark Rutland
On Fri, Jun 09, 2017 at 02:58:14PM -0700, Wesley Terpstra wrote: > Ugh. Clicked reply without being done writing the reply! > > On Thu, Jun 8, 2017 at 3:52 AM, Mark Rutland wrote: > > Edge vs level, active high vs active low. Typically some of these are > > programmable, and are described as

Re: [PATCH 08/17] dts: include documentation for the RISC-V interrupt controllers

2017-06-09 Thread Wesley Terpstra
Ugh. Clicked reply without being done writing the reply! On Thu, Jun 8, 2017 at 3:52 AM, Mark Rutland wrote: > Edge vs level, active high vs active low. Typically some of these are > programmable, and are described as flags in the interrupt-specifier. > > See the examples

Re: [PATCH 08/17] dts: include documentation for the RISC-V interrupt controllers

2017-06-09 Thread Wesley Terpstra
Ugh. Clicked reply without being done writing the reply! On Thu, Jun 8, 2017 at 3:52 AM, Mark Rutland wrote: > Edge vs level, active high vs active low. Typically some of these are > programmable, and are described as flags in the interrupt-specifier. > > See the examples in: > >

Re: [PATCH 08/17] dts: include documentation for the RISC-V interrupt controllers

2017-06-09 Thread Wesley Terpstra
On Thu, Jun 8, 2017 at 3:52 AM, Mark Rutland wrote: >> What flags? > > Edge vs level, active high vs active low. Typically some of these are > programmable, and are described as flags in the interrupt-specifier. > > See the examples in: > >

Re: [PATCH 08/17] dts: include documentation for the RISC-V interrupt controllers

2017-06-09 Thread Wesley Terpstra
On Thu, Jun 8, 2017 at 3:52 AM, Mark Rutland wrote: >> What flags? > > Edge vs level, active high vs active low. Typically some of these are > programmable, and are described as flags in the interrupt-specifier. > > See the examples in: > >

Re: [PATCH 08/17] dts: include documentation for the RISC-V interrupt controllers

2017-06-08 Thread Mark Rutland
On Wed, Jun 07, 2017 at 11:57:17AM -0700, Wesley Terpstra wrote: > On Wed, Jun 7, 2017 at 3:13 AM, Mark Rutland wrote: > >> > +RISC-V Hart-Level Interrupt Controller (HLIC) > >> > +- > >> > + > >> > +RISC-V cores include Control

Re: [PATCH 08/17] dts: include documentation for the RISC-V interrupt controllers

2017-06-08 Thread Mark Rutland
On Wed, Jun 07, 2017 at 11:57:17AM -0700, Wesley Terpstra wrote: > On Wed, Jun 7, 2017 at 3:13 AM, Mark Rutland wrote: > >> > +RISC-V Hart-Level Interrupt Controller (HLIC) > >> > +- > >> > + > >> > +RISC-V cores include Control Status Registers (CSRs)

Re: [PATCH 08/17] dts: include documentation for the RISC-V interrupt controllers

2017-06-07 Thread Luis R. Rodriguez
On Tue, Jun 6, 2017 at 3:59 PM, Palmer Dabbelt wrote: > From: "Wesley W. Terpstra" > > Signed-off-by: Palmer Dabbelt Small nitpick: its rather odd you send patches From one address but not provide the SOB tag for them as well, best if

Re: [PATCH 08/17] dts: include documentation for the RISC-V interrupt controllers

2017-06-07 Thread Luis R. Rodriguez
On Tue, Jun 6, 2017 at 3:59 PM, Palmer Dabbelt wrote: > From: "Wesley W. Terpstra" > > Signed-off-by: Palmer Dabbelt Small nitpick: its rather odd you send patches From one address but not provide the SOB tag for them as well, best if you can include the SOB tag of both. This applies to other

Re: [PATCH 08/17] dts: include documentation for the RISC-V interrupt controllers

2017-06-07 Thread Wesley Terpstra
I've reread the relevant sections now, and you are correct. We should remove the address-cells from the PLIC's dts. On Wed, Jun 7, 2017 at 12:57 PM, Rob Herring wrote: > On Wed, Jun 7, 2017 at 1:57 PM, Wesley Terpstra wrote: >> On Wed, Jun 7, 2017 at 3:13

Re: [PATCH 08/17] dts: include documentation for the RISC-V interrupt controllers

2017-06-07 Thread Wesley Terpstra
I've reread the relevant sections now, and you are correct. We should remove the address-cells from the PLIC's dts. On Wed, Jun 7, 2017 at 12:57 PM, Rob Herring wrote: > On Wed, Jun 7, 2017 at 1:57 PM, Wesley Terpstra wrote: >> On Wed, Jun 7, 2017 at 3:13 AM, Mark Rutland wrote: > +RISC-V

Re: [PATCH 08/17] dts: include documentation for the RISC-V interrupt controllers

2017-06-07 Thread Rob Herring
On Wed, Jun 7, 2017 at 1:57 PM, Wesley Terpstra wrote: > On Wed, Jun 7, 2017 at 3:13 AM, Mark Rutland wrote: >>> > +RISC-V Hart-Level Interrupt Controller (HLIC) >>> > +- [...] >>> > + plic:

Re: [PATCH 08/17] dts: include documentation for the RISC-V interrupt controllers

2017-06-07 Thread Rob Herring
On Wed, Jun 7, 2017 at 1:57 PM, Wesley Terpstra wrote: > On Wed, Jun 7, 2017 at 3:13 AM, Mark Rutland wrote: >>> > +RISC-V Hart-Level Interrupt Controller (HLIC) >>> > +- [...] >>> > + plic: interrupt-controller@c00 { >>> > +

Re: [PATCH 08/17] dts: include documentation for the RISC-V interrupt controllers

2017-06-07 Thread Wesley Terpstra
On Wed, Jun 7, 2017 at 3:13 AM, Mark Rutland wrote: >> > +RISC-V Hart-Level Interrupt Controller (HLIC) >> > +- >> > + >> > +RISC-V cores include Control Status Registers (CSRs) which are local to >> > each >> > +hart and can be

Re: [PATCH 08/17] dts: include documentation for the RISC-V interrupt controllers

2017-06-07 Thread Wesley Terpstra
On Wed, Jun 7, 2017 at 3:13 AM, Mark Rutland wrote: >> > +RISC-V Hart-Level Interrupt Controller (HLIC) >> > +- >> > + >> > +RISC-V cores include Control Status Registers (CSRs) which are local to >> > each >> > +hart and can be read or written by

Re: [PATCH 08/17] dts: include documentation for the RISC-V interrupt controllers

2017-06-07 Thread Mark Rutland
On Wed, Jun 07, 2017 at 09:11:31AM +0200, Geert Uytterhoeven wrote: > CC irqchip and devicetree folks Thanks Geert. Palmer, in future, you can ensure (most) relevant parties are Cc'd by using scripts/get_maintainer.pl to find them, and adding Cc: lines to the relevant patches. You can either

Re: [PATCH 08/17] dts: include documentation for the RISC-V interrupt controllers

2017-06-07 Thread Mark Rutland
On Wed, Jun 07, 2017 at 09:11:31AM +0200, Geert Uytterhoeven wrote: > CC irqchip and devicetree folks Thanks Geert. Palmer, in future, you can ensure (most) relevant parties are Cc'd by using scripts/get_maintainer.pl to find them, and adding Cc: lines to the relevant patches. You can either

Re: [PATCH 08/17] dts: include documentation for the RISC-V interrupt controllers

2017-06-07 Thread Geert Uytterhoeven
CC irqchip and devicetree folks On Wed, Jun 7, 2017 at 12:59 AM, Palmer Dabbelt wrote: > From: "Wesley W. Terpstra" > > Signed-off-by: Palmer Dabbelt > --- > .../interrupt-controller/riscv,cpu-intc.txt| 46 >

Re: [PATCH 08/17] dts: include documentation for the RISC-V interrupt controllers

2017-06-07 Thread Geert Uytterhoeven
CC irqchip and devicetree folks On Wed, Jun 7, 2017 at 12:59 AM, Palmer Dabbelt wrote: > From: "Wesley W. Terpstra" > > Signed-off-by: Palmer Dabbelt > --- > .../interrupt-controller/riscv,cpu-intc.txt| 46 > ++ > .../bindings/interrupt-controller/riscv,plic0.txt

[PATCH 08/17] dts: include documentation for the RISC-V interrupt controllers

2017-06-06 Thread Palmer Dabbelt
From: "Wesley W. Terpstra" Signed-off-by: Palmer Dabbelt --- .../interrupt-controller/riscv,cpu-intc.txt| 46 ++ .../bindings/interrupt-controller/riscv,plic0.txt | 44 + 2 files changed, 90 insertions(+)

[PATCH 08/17] dts: include documentation for the RISC-V interrupt controllers

2017-06-06 Thread Palmer Dabbelt
From: "Wesley W. Terpstra" Signed-off-by: Palmer Dabbelt --- .../interrupt-controller/riscv,cpu-intc.txt| 46 ++ .../bindings/interrupt-controller/riscv,plic0.txt | 44 + 2 files changed, 90 insertions(+) create mode 100644