Re: [PATCH 1/1] net: macb: ensure ordering write to re-enable RX smoothly

On 2016年11月28日 17:22, Nicolas Ferre wrote: Le 28/11/2016 à 08:57, Zumeng Chen a écrit : When a hardware issue happened as described by inline comments, the register write pattern looks like the following: + wmb(); There might be a memory barrier between these two write operations, s

Re: [PATCH 1/1] net: macb: ensure ordering write to re-enable RX smoothly

Le 28/11/2016 à 08:57, Zumeng Chen a écrit : > When a hardware issue happened as described by inline comments, the register > write pattern looks like the following: > > > + wmb(); > > > There might be a memory barrier between these two write operations, so add wmb > to ensure an flip fro

[PATCH 1/1] net: macb: ensure ordering write to re-enable RX smoothly

When a hardware issue happened as described by inline comments, the register write pattern looks like the following: + wmb(); There might be a memory barrier between these two write operations, so add wmb to ensure an flip from 0 to 1 for NCR. Signed-off-by: Zumeng Chen --- drivers/net