Re: [PATCH 1/1 v2] driver:mtd:spi-nor: Add Micron quad I/O support

2014-09-29 Thread Marek Vasut
On Monday, September 29, 2014 at 02:30:04 AM, bpqw wrote: > >> For Micron spi norflash,you can enable Quad spi transfer by clear > >> EVCR(Enhanced Volatile Configuration Register) Quad I/O protocol bit. > > > >OK, this information is nice and all, but what does this patch do? I can't > >learn

Re: [PATCH 1/1 v2] driver:mtd:spi-nor: Add Micron quad I/O support

2014-09-29 Thread Marek Vasut
On Monday, September 29, 2014 at 02:30:04 AM, bpqw wrote: For Micron spi norflash,you can enable Quad spi transfer by clear EVCR(Enhanced Volatile Configuration Register) Quad I/O protocol bit. OK, this information is nice and all, but what does this patch do? I can't learn this

RE: [PATCH 1/1 v2] driver:mtd:spi-nor: Add Micron quad I/O support

2014-09-28 Thread bpqw
>> For Micron spi norflash,you can enable Quad spi transfer by clear >> EVCR(Enhanced Volatile Configuration Register) Quad I/O protocol bit. > >OK, this information is nice and all, but what does this patch do? I can't >learn this information from the commit message as it is, can I ? >And ,

Re: [PATCH 1/1 v2] driver:mtd:spi-nor: Add Micron quad I/O support

2014-09-28 Thread Marek Vasut
On Sunday, September 28, 2014 at 03:59:42 AM, bpqw wrote: > For Micron spi norflash,you can enable > Quad spi transfer by clear EVCR(Enhanced > Volatile Configuration Register) Quad I/O > protocol bit. OK, this information is nice and all, but what does this patch do? I can't learn this

Re: [PATCH 1/1 v2] driver:mtd:spi-nor: Add Micron quad I/O support

2014-09-28 Thread Marek Vasut
On Sunday, September 28, 2014 at 03:59:42 AM, bpqw wrote: For Micron spi norflash,you can enable Quad spi transfer by clear EVCR(Enhanced Volatile Configuration Register) Quad I/O protocol bit. OK, this information is nice and all, but what does this patch do? I can't learn this information

RE: [PATCH 1/1 v2] driver:mtd:spi-nor: Add Micron quad I/O support

2014-09-28 Thread bpqw
For Micron spi norflash,you can enable Quad spi transfer by clear EVCR(Enhanced Volatile Configuration Register) Quad I/O protocol bit. OK, this information is nice and all, but what does this patch do? I can't learn this information from the commit message as it is, can I ? And , the

[PATCH 1/1 v2] driver:mtd:spi-nor: Add Micron quad I/O support

2014-09-27 Thread bpqw
For Micron spi norflash,you can enable Quad spi transfer by clear EVCR(Enhanced Volatile Configuration Register) Quad I/O protocol bit. Signed-off-by: bean huo --- v1-v2:modified to that capture wait_till_ready() return value,if error,directly return its the value.

[PATCH 1/1 v2] driver:mtd:spi-nor: Add Micron quad I/O support

2014-09-27 Thread bpqw
For Micron spi norflash,you can enable Quad spi transfer by clear EVCR(Enhanced Volatile Configuration Register) Quad I/O protocol bit. Signed-off-by: bean huo bean...@micron.com --- v1-v2:modified to that capture wait_till_ready() return value,if error,directly return its the