On 1/15/19 4:00 AM, Eugeniy Paltsev wrote:
>>> -#ifdef PREALLOC_NOT_AVAIL
>>> - prefetchw [r3, 64] ;Prefetch the next write location
>>> -#else
>>> - prealloc [r3, 64]
>>> -#endif
>>> + PREALLOC_INSTR([r3, 64]) ;Prefetch the next write location
>> These are not solving the issue - I'd b
Hi Vineet,
On Tue, 2019-01-15 at 01:09 +, Vineet Gupta wrote:
> On 1/14/19 7:17 AM, Eugeniy Paltsev wrote:
> > Current ARCv2 memeset implementation may call 'prefetchw'
> > instruction for address which lies outside of memset area.
> > So we got one modified (dirty) cache line outside of memse
On 1/14/19 7:17 AM, Eugeniy Paltsev wrote:
> Current ARCv2 memeset implementation may call 'prefetchw'
> instruction for address which lies outside of memset area.
> So we got one modified (dirty) cache line outside of memset
> area. This may lead to data corruption if this area is used
> for DMA I
Current ARCv2 memeset implementation may call 'prefetchw'
instruction for address which lies outside of memset area.
So we got one modified (dirty) cache line outside of memset
area. This may lead to data corruption if this area is used
for DMA IO.
Another issue is that current ARCv2 memeset imple
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