Re: [PATCH 1/2] clk: keystone: add support for post divider register for main pll

2015-06-22 Thread Murali Karicheri
On 06/18/2015 06:55 PM, santosh shilimkar wrote: On 6/18/2015 3:37 PM, Michael Turquette wrote: Quoting Murali Karicheri (2015-05-29 09:04:12) Main PLL controller has post divider bits in a separate register in pll controller. Use the value from this register instead of fixed divider when avail

Re: [PATCH 1/2] clk: keystone: add support for post divider register for main pll

2015-06-18 Thread santosh shilimkar
On 6/18/2015 3:37 PM, Michael Turquette wrote: Quoting Murali Karicheri (2015-05-29 09:04:12) Main PLL controller has post divider bits in a separate register in pll controller. Use the value from this register instead of fixed divider when available. Signed-off-by: Murali Karicheri Applied

Re: [PATCH 1/2] clk: keystone: add support for post divider register for main pll

2015-06-18 Thread Michael Turquette
Quoting Murali Karicheri (2015-05-29 09:04:12) > Main PLL controller has post divider bits in a separate register in > pll controller. Use the value from this register instead of fixed > divider when available. > > Signed-off-by: Murali Karicheri Applied to clk-next. Regards, Mike > --- > ...

Re: [PATCH 1/2] clk: keystone: add support for post divider register for main pll

2015-06-15 Thread Murali Karicheri
On 05/29/2015 12:04 PM, Murali Karicheri wrote: Main PLL controller has post divider bits in a separate register in pll controller. Use the value from this register instead of fixed divider when available. Signed-off-by: Murali Karicheri --- .../devicetree/bindings/clock/keystone-pll.txt

Re: [PATCH 1/2] clk: keystone: add support for post divider register for main pll

2015-06-09 Thread Murali Karicheri
On 05/29/2015 12:04 PM, Murali Karicheri wrote: Main PLL controller has post divider bits in a separate register in pll controller. Use the value from this register instead of fixed divider when available. Signed-off-by: Murali Karicheri --- .../devicetree/bindings/clock/keystone-pll.txt

[PATCH 1/2] clk: keystone: add support for post divider register for main pll

2015-05-29 Thread Murali Karicheri
Main PLL controller has post divider bits in a separate register in pll controller. Use the value from this register instead of fixed divider when available. Signed-off-by: Murali Karicheri --- .../devicetree/bindings/clock/keystone-pll.txt | 8 drivers/clk/keystone/pll.c