Re: [PATCH 1/2] clk: qoriq: add clock configuration for ls1088a soc

On 04/06, Yuantian Tang wrote: > Clock on ls1088a chip takes primary clocking input from the external > SYSCLK signal. The SYSCLK input (frequency) is multiplied using > multiple phase locked loops (PLL) to create a variety of frequencies > which can then be passed to a variety of internal logic, i

[PATCH 1/2] clk: qoriq: add clock configuration for ls1088a soc

Clock on ls1088a chip takes primary clocking input from the external SYSCLK signal. The SYSCLK input (frequency) is multiplied using multiple phase locked loops (PLL) to create a variety of frequencies which can then be passed to a variety of internal logic, including cores and peripheral IP module