Re: [PATCH 1/2] clk: tegra30: Add hda clock default rates to clock driver

On 25/12/2020 01:20, Peter Geis wrote: > Current implementation defaults the hda clocks to clk_m. > This causes hda to run too slow to operate correctly. > Fix this by defaulting to pll_p and setting the frequency to the correct rate. > > This matches upstream t124 and downstream t30. > >

[PATCH 1/2] clk: tegra30: Add hda clock default rates to clock driver

Current implementation defaults the hda clocks to clk_m. This causes hda to run too slow to operate correctly. Fix this by defaulting to pll_p and setting the frequency to the correct rate. This matches upstream t124 and downstream t30. Signed-off-by: Peter Geis Tested-by: Ion Agorria ---