Hi Bjorn,
Thank you for reviewing.
On Wed, 5 Sep 2018 12:21:18 -0500 wrote:
>
> Please follow the capitalization convention, i.e.,
>
> $ git log --oneline --no-merges Documentaon/devicetree/bindings/pci/ | grep
> -i pci
> 82dfbd27c837 dt-bindings: PCI: cadence: Add DT bindings for option
Please follow the capitalization convention, i.e.,
$ git log --oneline --no-merges Documentaon/devicetree/bindings/pci/ | grep
-i pci
82dfbd27c837 dt-bindings: PCI: cadence: Add DT bindings for optional PHYs
92f9ccca4c08 PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver DT
bindings
Add DT bindings for PCIe controller implemented in UniPhier SoCs when
configured in Root Complex (host) mode. This controller is based on
the Designware PCIe Core.
Signed-off-by: Kunihiko Hayashi
---
.../devicetree/bindings/pci/uniphier-pcie.txt | 78 ++
1 file changed,
3 matches
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