kernel.org; linux-
> ker...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; Scott Wood
> <o...@buserror.net>; Rob Herring <r...@kernel.org>
> Subject: Re: [PATCH 1/2] dt-bindings: qoriq-clock: Add coreclk
>
> On 03/09, Y.T. Tang wrote:
> > Hi Michael and Stephen
er...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; Scott Wood
> ; Rob Herring
> Subject: Re: [PATCH 1/2] dt-bindings: qoriq-clock: Add coreclk
>
> On 03/09, Y.T. Tang wrote:
> > Hi Michael and Stephen,
> >
> > This patch set was acked by Rob Herring. Do you have
On 03/09, Y.T. Tang wrote:
> Hi Michael and Stephen,
>
> This patch set was acked by Rob Herring. Do you have any comments on them?
>
> BTW: Scott should stay in author, do I need to resend them with author
> changed or you can change it when applying?
>
Please resend these two patches.
--
On 03/09, Y.T. Tang wrote:
> Hi Michael and Stephen,
>
> This patch set was acked by Rob Herring. Do you have any comments on them?
>
> BTW: Scott should stay in author, do I need to resend them with author
> changed or you can change it when applying?
>
Please resend these two patches.
--
rg; Scott Wood
> Subject: Re: [PATCH 1/2] dt-bindings: qoriq-clock: Add coreclk
>
> On Wed, Feb 15, 2017 at 01:47:35PM +0800, yuantian.t...@nxp.com wrote:
> > From: Tang Yuantian <yuantian.t...@nxp.com>
> >
> > ls1012a has separate input root clocks for core PL
rg; Scott Wood
> Subject: Re: [PATCH 1/2] dt-bindings: qoriq-clock: Add coreclk
>
> On Wed, Feb 15, 2017 at 01:47:35PM +0800, yuantian.t...@nxp.com wrote:
> > From: Tang Yuantian
> >
> > ls1012a has separate input root clocks for core PLLs versus the
> > platfor
com>
>> Cc: mturque...@baylibre.com; sb...@codeaurora.org;
>> mark.rutl...@arm.com; linux-...@vger.kernel.org;
>> devicet...@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm-
>> ker...@lists.infradead.org; Scott Wood <o...@buserror.net>
>> Subject: Re: [PATCH 1/2]
.org;
>> mark.rutl...@arm.com; linux-...@vger.kernel.org;
>> devicet...@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm-
>> ker...@lists.infradead.org; Scott Wood
>> Subject: Re: [PATCH 1/2] dt-bindings: qoriq-clock: Add coreclk
>>
>> On Wed, Feb 15, 2017 at
devicet...@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm-
> ker...@lists.infradead.org; Scott Wood <o...@buserror.net>
> Subject: Re: [PATCH 1/2] dt-bindings: qoriq-clock: Add coreclk
>
> On Wed, Feb 15, 2017 at 01:47:35PM +0800, yuantian.t...@nxp.com wrote:
&
nel.org; linux-kernel@vger.kernel.org; linux-arm-
> ker...@lists.infradead.org; Scott Wood
> Subject: Re: [PATCH 1/2] dt-bindings: qoriq-clock: Add coreclk
>
> On Wed, Feb 15, 2017 at 01:47:35PM +0800, yuantian.t...@nxp.com wrote:
> > From: Tang Yuantian
> >
> > ls1012a
On Wed, Feb 15, 2017 at 01:47:35PM +0800, yuantian.t...@nxp.com wrote:
> From: Tang Yuantian
>
> ls1012a has separate input root clocks for core PLLs versus the platform
> PLL, with the latter described as sysclk in the hw docs.
> Update the qoriq-clock binding to allow a
On Wed, Feb 15, 2017 at 01:47:35PM +0800, yuantian.t...@nxp.com wrote:
> From: Tang Yuantian
>
> ls1012a has separate input root clocks for core PLLs versus the platform
> PLL, with the latter described as sysclk in the hw docs.
> Update the qoriq-clock binding to allow a second input clock,
ernel.org; devicet...@vger.kernel.org; linux-
> ker...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; Y.T. Tang
> <yuantian.t...@nxp.com>; Scott Wood <o...@buserror.net>; Y.T. Tang
> <yuantian.t...@nxp.com>
> Subject: [PATCH 1/2] dt-bindings: qoriq-clock:
ernel.org; devicet...@vger.kernel.org; linux-
> ker...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; Y.T. Tang
> ; Scott Wood ; Y.T. Tang
>
> Subject: [PATCH 1/2] dt-bindings: qoriq-clock: Add coreclk
>
> From: Tang Yuantian
>
> ls1012a has separate input root cl
From: Tang Yuantian
ls1012a has separate input root clocks for core PLLs versus the platform
PLL, with the latter described as sysclk in the hw docs.
Update the qoriq-clock binding to allow a second input clock, named
"coreclk". If present, this clock will be used for the
From: Tang Yuantian
ls1012a has separate input root clocks for core PLLs versus the platform
PLL, with the latter described as sysclk in the hw docs.
Update the qoriq-clock binding to allow a second input clock, named
"coreclk". If present, this clock will be used for the core PLLs.
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