Re: [PATCH 1/2] iommu/intel: Avoid SAC address trick for PCIe devices

2020-07-10 Thread Joerg Roedel
On Wed, Jul 08, 2020 at 12:32:41PM +0100, Robin Murphy wrote: > For devices stuck behind a conventional PCI bus, saving extra cycles at > 33MHz is probably fairly significant. However since native PCI Express > is now the norm for high-performance devices, the optimisation to always > prefer

Re: [PATCH 1/2] iommu/intel: Avoid SAC address trick for PCIe devices

2020-07-08 Thread Christoph Hellwig
Looks pretty sensible. > - if (!dmar_forcedac && dma_mask > DMA_BIT_MASK(32)) { > + if (!dmar_forcedac && dma_mask > DMA_BIT_MASK(32) && > + dev_is_pci(dev) && !pci_is_pcie(to_pci_dev(dev))) { The only thing I wonder is if it is worth to add a little helper for this check, but

[PATCH 1/2] iommu/intel: Avoid SAC address trick for PCIe devices

2020-07-08 Thread Robin Murphy
For devices stuck behind a conventional PCI bus, saving extra cycles at 33MHz is probably fairly significant. However since native PCI Express is now the norm for high-performance devices, the optimisation to always prefer 32-bit addresses for the sake of avoiding DAC is starting to look rather