Re: [PATCH 1/2] mfd: s2mps11: Add manual shutdown method for Odroid XU3

2015-08-10 Thread Krzysztof Kozlowski
On 11.08.2015 00:49, Lee Jones wrote: > On Mon, 03 Aug 2015, Krzysztof Kozlowski wrote: > >> On Odroid XU3 board (with S2MPS11 PMIC) the PWRHOLD bit in CTRL1 >> register must be manually set to 0 before initiating power off sequence. >> >> One of usual power down methods for Exynos based devices l

Re: [PATCH 1/2] mfd: s2mps11: Add manual shutdown method for Odroid XU3

2015-08-10 Thread Lee Jones
On Mon, 03 Aug 2015, Krzysztof Kozlowski wrote: > On Odroid XU3 board (with S2MPS11 PMIC) the PWRHOLD bit in CTRL1 > register must be manually set to 0 before initiating power off sequence. > > One of usual power down methods for Exynos based devices looks like: > 1. PWRHOLD pin of PMIC is connec

Re: [PATCH 1/2] mfd: s2mps11: Add manual shutdown method for Odroid XU3

2015-08-05 Thread Javier Martinez Canillas
Hello Krzysztof, On 08/03/2015 02:37 PM, Krzysztof Kozlowski wrote: > On Odroid XU3 board (with S2MPS11 PMIC) the PWRHOLD bit in CTRL1 > register must be manually set to 0 before initiating power off sequence. > > One of usual power down methods for Exynos based devices looks like: > 1. PWRHOLD p

Re: [PATCH 1/2] mfd: s2mps11: Add manual shutdown method for Odroid XU3

2015-08-03 Thread Anand Moon
Hi Krzysztof, On 3 August 2015 at 18:07, Krzysztof Kozlowski wrote: > On Odroid XU3 board (with S2MPS11 PMIC) the PWRHOLD bit in CTRL1 > register must be manually set to 0 before initiating power off sequence. > > One of usual power down methods for Exynos based devices looks like: > 1. PWRHOLD p

[PATCH 1/2] mfd: s2mps11: Add manual shutdown method for Odroid XU3

2015-08-03 Thread Krzysztof Kozlowski
On Odroid XU3 board (with S2MPS11 PMIC) the PWRHOLD bit in CTRL1 register must be manually set to 0 before initiating power off sequence. One of usual power down methods for Exynos based devices looks like: 1. PWRHOLD pin of PMIC is connected to PSHOLD of Exynos. 2. Exynos holds up this pin during