Re: [PATCH 1/2] net: ag71xx: Slighly simplify code in 'ag71xx_rings_init()'

2019-08-07 Thread Jesse Brandeburg
On Wed, 31 Jul 2019 10:06:38 +0200 Christophe JAILLET wrote: > A few lines above, we have: >tx_size = BIT(tx->order); > > So use 'tx_size' directly to be consistent with the way 'rx->descs_cpu' and > 'rx->descs_dma' are computed below. > > Signed-off-by: Christophe JAILLET Reviewed-by: Je

Re: [PATCH 1/2] net: ag71xx: Slighly simplify code in 'ag71xx_rings_init()'

2019-07-31 Thread David Miller
From: Christophe JAILLET Date: Wed, 31 Jul 2019 10:06:38 +0200 > A few lines above, we have: >tx_size = BIT(tx->order); > > So use 'tx_size' directly to be consistent with the way 'rx->descs_cpu' and > 'rx->descs_dma' are computed below. > > Signed-off-by: Christophe JAILLET Applied to ne

[PATCH 1/2] net: ag71xx: Slighly simplify code in 'ag71xx_rings_init()'

2019-07-31 Thread Christophe JAILLET
A few lines above, we have: tx_size = BIT(tx->order); So use 'tx_size' directly to be consistent with the way 'rx->descs_cpu' and 'rx->descs_dma' are computed below. Signed-off-by: Christophe JAILLET --- drivers/net/ethernet/atheros/ag71xx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion