On Tue, Jan 03, 2017 at 05:55:54PM +0100, Alexandre Belloni wrote:
> On 03/01/2017 at 16:59:57 +0100, Olliver Schinagl wrote :
> > On 12-12-16 13:24, Maxime Ripard wrote:
> > > On Thu, Dec 08, 2016 at 02:23:39PM +0100, Olliver Schinagl wrote:
> > > > Hey Maxime,
> > > >
> > > > first off, also sor
On 03/01/2017 at 16:59:57 +0100, Olliver Schinagl wrote :
> On 12-12-16 13:24, Maxime Ripard wrote:
> > On Thu, Dec 08, 2016 at 02:23:39PM +0100, Olliver Schinagl wrote:
> > > Hey Maxime,
> > >
> > > first off, also sorry for the slow delay :) (pun not intended)
> > >
> > > On 27-08-16 00:19, Max
Hey Maxime,
Happy new year! I'm sorry that I missed your previous mail! I completely
looked over it. Sorry!
On 12-12-16 13:24, Maxime Ripard wrote:
On Thu, Dec 08, 2016 at 02:23:39PM +0100, Olliver Schinagl wrote:
Hey Maxime,
first off, also sorry for the slow delay :) (pun not intended)
O
On Thu, Dec 08, 2016 at 02:23:39PM +0100, Olliver Schinagl wrote:
> Hey Maxime,
>
> first off, also sorry for the slow delay :) (pun not intended)
>
> On 27-08-16 00:19, Maxime Ripard wrote:
> > On Thu, Aug 25, 2016 at 07:50:10PM +0200, Olliver Schinagl wrote:
> > > When we inform the PWM block t
Hi,
On Mon, Sep 26, 2016 at 10:46:25AM +0200, Olliver Schinagl wrote:
> > For the spin_lock part, I was just comparing it to a
> > spin_lock_irqsave, which is pretty expensive since it masks all the
> > interrupts in the system, introducing latencies.
>
> so spin_lock is very expensive and we shou
On za, 2016-09-24 at 22:25 +0200, Maxime Ripard wrote:
> Hi Oliver,
>
> Sorry for the slow answer.
>
> On Fri, Sep 09, 2016 at 11:01:08AM +0200, Olliver Schinagl wrote:
> >
> > >
> > > >
> > > > >
> > > > > >
> > > > > > *chip, struct pwm_device *pwm)
> > > > > > spin_lock(&sun4i_pwm->ct
Hi Oliver,
Sorry for the slow answer.
On Fri, Sep 09, 2016 at 11:01:08AM +0200, Olliver Schinagl wrote:
> > > > > *chip, struct pwm_device *pwm)
> > > > > spin_lock(&sun4i_pwm->ctrl_lock);
> > > > > val = sun4i_pwm_readl(sun4i_pwm, PWM_CTRL_REG);
> > > > > val &= ~BIT_CH(PWM_EN,
On di, 2016-09-06 at 21:51 +0200, Maxime Ripard wrote:
> On Tue, Sep 06, 2016 at 09:12:56AM +0200, Olliver Schinagl wrote:
> >
> > Hi Maxime!,
> >
> > On za, 2016-08-27 at 00:19 +0200, Maxime Ripard wrote:
> > >
> > > On Thu, Aug 25, 2016 at 07:50:10PM +0200, Olliver Schinagl wrote:
> > > >
> >
On Tue, Sep 06, 2016 at 09:12:56AM +0200, Olliver Schinagl wrote:
> Hi Maxime!,
>
> On za, 2016-08-27 at 00:19 +0200, Maxime Ripard wrote:
> > On Thu, Aug 25, 2016 at 07:50:10PM +0200, Olliver Schinagl wrote:
> > >
> > > When we inform the PWM block to stop toggeling the output, we may
> > > end
Hi Maxime!,
On za, 2016-08-27 at 00:19 +0200, Maxime Ripard wrote:
> On Thu, Aug 25, 2016 at 07:50:10PM +0200, Olliver Schinagl wrote:
> >
> > When we inform the PWM block to stop toggeling the output, we may
> > end up
> > in a state where the output is not what we would expect (e.g. not
> > the
On Thu, Aug 25, 2016 at 07:50:10PM +0200, Olliver Schinagl wrote:
> When we inform the PWM block to stop toggeling the output, we may end up
> in a state where the output is not what we would expect (e.g. not the
> low-pulse) but whatever the output was at when the clock got disabled.
>
> To count
When we inform the PWM block to stop toggeling the output, we may end up
in a state where the output is not what we would expect (e.g. not the
low-pulse) but whatever the output was at when the clock got disabled.
To counter this we have to wait for maximally the time of one whole
period to ensure
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