Re: [PATCH 1/2] regulator: anatop: Add power gating support to digital LDOs

2014-02-10 Thread Mark Brown
On Mon, Feb 10, 2014 at 02:27:55PM +0100, Philipp Zabel wrote: > yes, thanks. I'll fix this. What should happen if the > regulator_set_voltage_sel_regmap fails? Is it ok to still > set the cache in this case? Either way is fine but not updating the cache is probably better - if it was a physical

Re: [PATCH 1/2] regulator: anatop: Add power gating support to digital LDOs

2014-02-10 Thread Philipp Zabel
Hi Mark, Am Montag, den 10.02.2014, 13:15 + schrieb Mark Brown: > On Thu, Feb 06, 2014 at 03:43:32PM +0100, Philipp Zabel wrote: > > The ARM, PU, and SOC LDOs in the i.MX6 PMU can completely gate > > their power output. Since power gating is configured by writing > > zero to the voltage target

Re: [PATCH 1/2] regulator: anatop: Add power gating support to digital LDOs

2014-02-10 Thread Mark Brown
On Thu, Feb 06, 2014 at 03:43:32PM +0100, Philipp Zabel wrote: > The ARM, PU, and SOC LDOs in the i.MX6 PMU can completely gate > their power output. Since power gating is configured by writing > zero to the voltage target bitfield,, store a copy of the > voltage selector to be restored when reenab

Re: [PATCH 1/2] regulator: anatop: Add power gating support to digital LDOs

2014-02-09 Thread Shawn Guo
On Thu, Feb 06, 2014 at 03:43:32PM +0100, Philipp Zabel wrote: > The ARM, PU, and SOC LDOs in the i.MX6 PMU can completely gate > their power output. Since power gating is configured by writing > zero to the voltage target bitfield,, store a copy of the > voltage selector to be restored when reenab

[PATCH 1/2] regulator: anatop: Add power gating support to digital LDOs

2014-02-06 Thread Philipp Zabel
The ARM, PU, and SOC LDOs in the i.MX6 PMU can completely gate their power output. Since power gating is configured by writing zero to the voltage target bitfield,, store a copy of the voltage selector to be restored when reenabling the regulator. Signed-off-by: Philipp Zabel --- drivers/regulat