> +#ifdef CONFIG_PCIEAER
> + struct device_node *node = dev->of_node;
> +#endif
>
> breg_val = nwl_bridge_readl(pcie, E_BREG_CAPABILITIES) & BREG_PRESENT;
> if (!breg_val) {
> @@ -744,6 +747,9 @@ static int nwl_pcie_bridge_init(struct nwl_pcie *pcie)
> pcie->
Xilinx ZynqMP PS PCIe has dedicated interrupt line for
reporting PCIe errors along with AER.
Save this error irq number in struct device_node private data,
this will be used via PCI qiurks for AER kernel service.
Signed-off-by: Bharat Kumar Gogada
---
drivers/pci/controller/pcie-xilinx-nwl.c |
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