> On 20 Jan 2021, at 14:16, Marc Zyngier wrote:
>
> Hi Mohamed,
>
> On 2021-01-20 11:36, Mohamed Mediouni wrote:
>> From: Stan Skowronek
>> On Apple processors, the timer is wired through FIQ.
>
> Which timer? There are at least 3, potentially 4 timers per CPU
> that can fire.
This is
Hi Mohamed,
On 2021-01-20 11:36, Mohamed Mediouni wrote:
From: Stan Skowronek
On Apple processors, the timer is wired through FIQ.
Which timer? There are at least 3, potentially 4 timers per CPU
that can fire.
As such, add FIQ support to the kernel.
Signed-off-by: Stan Skowronek
From: Stan Skowronek
On Apple processors, the timer is wired through FIQ.
As such, add FIQ support to the kernel.
Signed-off-by: Stan Skowronek
---
arch/arm64/include/asm/arch_gicv3.h | 2 +-
arch/arm64/include/asm/assembler.h | 8 ++--
arch/arm64/include/asm/daifflags.h | 4 +-
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