Changed 'unsigned' to 'unsigned int'.
This makes the code more uniform, and compliant with the kernel coding style.

Signed-off-by: Abanoub Sameh <abanoubsa...@protonmail.com>
---
 drivers/gpio/gpio-intel-mid.c | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/gpio/gpio-intel-mid.c b/drivers/gpio/gpio-intel-mid.c
index 86a10c808ef6..6487acab104c 100644
--- a/drivers/gpio/gpio-intel-mid.c
+++ b/drivers/gpio/gpio-intel-mid.c
@@ -64,27 +64,27 @@ struct intel_mid_gpio {
        struct pci_dev                  *pdev;
 };
 
-static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned offset,
+static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned int offset,
                              enum GPIO_REG reg_type)
 {
        struct intel_mid_gpio *priv = gpiochip_get_data(chip);
-       unsigned nreg = chip->ngpio / 32;
+       unsigned int nreg = chip->ngpio / 32;
        u8 reg = offset / 32;
 
        return priv->reg_base + reg_type * nreg * 4 + reg * 4;
 }
 
-static void __iomem *gpio_reg_2bit(struct gpio_chip *chip, unsigned offset,
+static void __iomem *gpio_reg_2bit(struct gpio_chip *chip, unsigned int offset,
                                   enum GPIO_REG reg_type)
 {
        struct intel_mid_gpio *priv = gpiochip_get_data(chip);
-       unsigned nreg = chip->ngpio / 32;
+       unsigned int nreg = chip->ngpio / 32;
        u8 reg = offset / 16;
 
        return priv->reg_base + reg_type * nreg * 4 + reg * 4;
 }
 
-static int intel_gpio_request(struct gpio_chip *chip, unsigned offset)
+static int intel_gpio_request(struct gpio_chip *chip, unsigned int offset)
 {
        void __iomem *gafr = gpio_reg_2bit(chip, offset, GAFR);
        u32 value = readl(gafr);
@@ -97,14 +97,14 @@ static int intel_gpio_request(struct gpio_chip *chip, 
unsigned offset)
        return 0;
 }
 
-static int intel_gpio_get(struct gpio_chip *chip, unsigned offset)
+static int intel_gpio_get(struct gpio_chip *chip, unsigned int offset)
 {
        void __iomem *gplr = gpio_reg(chip, offset, GPLR);
 
        return !!(readl(gplr) & BIT(offset % 32));
 }
 
-static void intel_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
+static void intel_gpio_set(struct gpio_chip *chip, unsigned int offset, int 
value)
 {
        void __iomem *gpsr, *gpcr;
 
@@ -117,7 +117,7 @@ static void intel_gpio_set(struct gpio_chip *chip, unsigned 
offset, int value)
        }
 }
 
-static int intel_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
+static int intel_gpio_direction_input(struct gpio_chip *chip, unsigned int 
offset)
 {
        struct intel_mid_gpio *priv = gpiochip_get_data(chip);
        void __iomem *gpdr = gpio_reg(chip, offset, GPDR);
@@ -140,7 +140,7 @@ static int intel_gpio_direction_input(struct gpio_chip 
*chip, unsigned offset)
 }
 
 static int intel_gpio_direction_output(struct gpio_chip *chip,
-                       unsigned offset, int value)
+                       unsigned int offset, int value)
 {
        struct intel_mid_gpio *priv = gpiochip_get_data(chip);
        void __iomem *gpdr = gpio_reg(chip, offset, GPDR);
@@ -163,7 +163,7 @@ static int intel_gpio_direction_output(struct gpio_chip 
*chip,
        return 0;
 }
 
-static int intel_mid_irq_type(struct irq_data *d, unsigned type)
+static int intel_mid_irq_type(struct irq_data *d, unsigned int type)
 {
        struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
        struct intel_mid_gpio *priv = gpiochip_get_data(gc);
@@ -297,7 +297,7 @@ static int intel_mid_irq_init_hw(struct gpio_chip *chip)
 {
        struct intel_mid_gpio *priv = gpiochip_get_data(chip);
        void __iomem *reg;
-       unsigned base;
+       unsigned int base;
 
        for (base = 0; base < priv->chip.ngpio; base += 32) {
                /* Clear the rising-edge detect register */
-- 
2.28.0.rc0

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