Re: [PATCH 1/3] irqchip: atmel-aic5: fix bug with mask/unmask

2015-09-22 Thread Ludovic Desroches
On Tue, Sep 22, 2015 at 03:50:30PM +0200, Thomas Gleixner wrote: > On Tue, 22 Sep 2015, Boris Brezillon wrote: > > On Tue, 22 Sep 2015 12:27:08 +0200 (CEST) > > Thomas Gleixner wrote: > > > Why is this locking dgc->gc[0] and fiddling with some other generic > > > chip? > > > > Actually, we always

Re: [PATCH 1/3] irqchip: atmel-aic5: fix bug with mask/unmask

2015-09-22 Thread Thomas Gleixner
On Tue, 22 Sep 2015, Boris Brezillon wrote: > On Tue, 22 Sep 2015 12:27:08 +0200 (CEST) > Thomas Gleixner wrote: > > Why is this locking dgc->gc[0] and fiddling with some other generic > > chip? > > Actually, we always access the same set of registers for all irqs of the > domain, and thus need t

Re: [PATCH 1/3] irqchip: atmel-aic5: fix bug with mask/unmask

2015-09-22 Thread Boris Brezillon
Hi Thomas, On Tue, 22 Sep 2015 12:27:08 +0200 (CEST) Thomas Gleixner wrote: > On Mon, 21 Sep 2015, Ludovic Desroches wrote: > > diff --git a/drivers/irqchip/irq-atmel-aic5.c > > b/drivers/irqchip/irq-atmel-aic5.c > > index 9da9942..6c5fd25 100644 > > --- a/drivers/irqchip/irq-atmel-aic5.c > > +

Re: [PATCH 1/3] irqchip: atmel-aic5: fix bug with mask/unmask

2015-09-22 Thread Thomas Gleixner
On Mon, 21 Sep 2015, Ludovic Desroches wrote: > diff --git a/drivers/irqchip/irq-atmel-aic5.c > b/drivers/irqchip/irq-atmel-aic5.c > index 9da9942..6c5fd25 100644 > --- a/drivers/irqchip/irq-atmel-aic5.c > +++ b/drivers/irqchip/irq-atmel-aic5.c > @@ -88,28 +88,30 @@ static void aic5_mask(struct ir

Re: [PATCH 1/3] irqchip: atmel-aic5: fix bug with mask/unmask

2015-09-22 Thread Nicolas Ferre
Le 21/09/2015 15:46, Ludovic Desroches a écrit : > When masking/unmasking interrupts, mask_cache is updated and used later > for suspend/resume. Unfortunately, it always was the mask_cache > associated with the first irq chip which was updated. So when performing > resume, only irqs 0-31 could be e

Re: [PATCH 1/3] irqchip: atmel-aic5: fix bug with mask/unmask

2015-09-22 Thread Boris Brezillon
Hi Ludovic, On Mon, 21 Sep 2015 15:46:04 +0200 Ludovic Desroches wrote: > When masking/unmasking interrupts, mask_cache is updated and used later > for suspend/resume. Unfortunately, it always was the mask_cache > associated with the first irq chip which was updated. So when performing > resume,

[PATCH 1/3] irqchip: atmel-aic5: fix bug with mask/unmask

2015-09-21 Thread Ludovic Desroches
When masking/unmasking interrupts, mask_cache is updated and used later for suspend/resume. Unfortunately, it always was the mask_cache associated with the first irq chip which was updated. So when performing resume, only irqs 0-31 could be enabled and maybe not the good ones! Signed-off-by: Ludov