On 04/23, Jiancheng Xue wrote:
> In most of hisilicon SOCs, reset controller and clock provider are
> combined together as a block named CRG (Clock and Reset Generator).
> This patch mainly implements the reset function.
>
> Signed-off-by: Jiancheng Xue
> Acked-by: Philipp Zabel
> ---
Applied t
In most of hisilicon SOCs, reset controller and clock provider are
combined together as a block named CRG (Clock and Reset Generator).
This patch mainly implements the reset function.
Signed-off-by: Jiancheng Xue
Acked-by: Philipp Zabel
---
drivers/clk/hisilicon/Kconfig | 7 +++
drivers/clk/
2 matches
Mail list logo