Re: [PATCH 1/3] spi: spi-xilinx: Remove ISR race condition

> >> >> = >> spi: xilinx - minimize iomem reads >> >> If this IP core is accessed through bridges like PCI-e, reads are rather >> costly. Doing many reads or read-modify-writes is thus long and strenuous >> on the CPU (active waiting). >> >> The transfer workflow of

Re: [PATCH 1/3] spi: spi-xilinx: Remove ISR race condition

> >> >> = >> spi: xilinx - minimize iomem reads >> >> If this IP core is accessed through bridges like PCI-e, reads are rather >> costly. Doing many reads or read-modify-writes is thus long and strenuous >> on the CPU (active waiting). >> >> The transfer workflow of

Re: [PATCH 1/3] spi: spi-xilinx: Remove ISR race condition

On Thu, Oct 8, 2015 at 8:40 PM, Jean-Francois Dagenais wrote: > >> On Jun 4, 2013, at 1:32 PM, Mark Brown wrote: >> >> Applied but this is a bit sad, having to defer the refill to process >> context means that we're adding extra latency which takes us further >> away from being able to saturate

Re: [PATCH 1/3] spi: spi-xilinx: Remove ISR race condition

On Thu, Oct 8, 2015 at 8:40 PM, Jean-Francois Dagenais wrote: > >> On Jun 4, 2013, at 1:32 PM, Mark Brown wrote: >> >> Applied but this is a bit sad, having to defer the refill to process >> context means that we're adding extra latency which takes us

Re: [PATCH 1/3] spi: spi-xilinx: Remove ISR race condition

> On Jun 4, 2013, at 1:32 PM, Mark Brown wrote: > > Applied but this is a bit sad, having to defer the refill to process > context means that we're adding extra latency which takes us further > away from being able to saturate the bus. There ought to be a way to > avoid the issue though I

Re: [PATCH 1/3] spi: spi-xilinx: Remove ISR race condition

> On Jun 4, 2013, at 1:32 PM, Mark Brown wrote: > > Applied but this is a bit sad, having to defer the refill to process > context means that we're adding extra latency which takes us further > away from being able to saturate the bus. There ought to be a way to > avoid the

Re: [PATCH 1/3] spi: spi-xilinx: Remove ISR race condition

On Tue, Jun 04, 2013 at 04:02:34PM +0200, Michal Simek wrote: > The ISR currently consumes the rx buffer data and re-enables transmission > from within interrupt context. This is bad because if the interrupt > occurs again before the ISR exits, the new interrupt will be erroneously > cleared by

[PATCH 1/3] spi: spi-xilinx: Remove ISR race condition

From: Peter Crosthwaite The ISR currently consumes the rx buffer data and re-enables transmission from within interrupt context. This is bad because if the interrupt occurs again before the ISR exits, the new interrupt will be erroneously cleared by the still completing ISR. Simplified the ISR

[PATCH 1/3] spi: spi-xilinx: Remove ISR race condition

From: Peter Crosthwaite peter.crosthwa...@petalogix.com The ISR currently consumes the rx buffer data and re-enables transmission from within interrupt context. This is bad because if the interrupt occurs again before the ISR exits, the new interrupt will be erroneously cleared by the still

Re: [PATCH 1/3] spi: spi-xilinx: Remove ISR race condition

On Tue, Jun 04, 2013 at 04:02:34PM +0200, Michal Simek wrote: The ISR currently consumes the rx buffer data and re-enables transmission from within interrupt context. This is bad because if the interrupt occurs again before the ISR exits, the new interrupt will be erroneously cleared by the