On Fri, 10 Jun 2016, Boris Brezillon wrote:
> > Basically, in the general case, the controller can handle a matrix of
> > nand flash chips. There can be a number of banks, each of which can
> > have a number of individual CS lines. For the (in this case academic)
> > case of 3 banks and 4 chip
On Fri, 10 Jun 2016 18:46:24 +0200
Ricard Wanderlof wrote:
> On Fri, 10 Jun 2016, Boris Brezillon wrote:
>
> > > The use cases as I see are as follows:
> > >
> > > a) Two identical chips sharing all but the CS lines, in order to
> > > implement
> > > a seemingly-larger address space. (e.g. tw
On Fri, 10 Jun 2016, Boris Brezillon wrote:
> > The use cases as I see are as follows:
> >
> > a) Two identical chips sharing all but the CS lines, in order to implement
> > a seemingly-larger address space. (e.g. two 256 Mbit chips implementing a
> > 4 GB area). In this case, for certain oper
On Fri, 10 Jun 2016 17:35:24 +0200
Ricard Wanderlof wrote:
> On Wed, 8 Jun 2016, Boris Brezillon wrote:
>
> > > > > +Optional properties:
> > > > > +- nand-on-flash-bbt: See nand.txt.
> > > > > +- #address-cells, #size-cells: See partition.txt.
> > > > > +- evatronix,use-bank-select : Use contro
On Wed, 8 Jun 2016, Boris Brezillon wrote:
> > > > +Optional properties:
> > > > +- nand-on-flash-bbt: See nand.txt.
> > > > +- #address-cells, #size-cells: See partition.txt.
> > > > +- evatronix,use-bank-select : Use controller bank select function to
> > > > access
> > > > +
On Tue, 7 Jun 2016 17:01:41 +0200
Ricard Wanderlof wrote:
> Hi Boris,
>
> First of all, thanks for reviewing this.
>
> On Fri, 3 Jun 2016, Boris Brezillon wrote:
>
> > > +
> > > +Optional properties:
> > > +- nand-on-flash-bbt: See nand.txt.
> > > +- #address-cells, #size-cells: See partition.
Hi Boris,
First of all, thanks for reviewing this.
On Fri, 3 Jun 2016, Boris Brezillon wrote:
> > +
> > +Optional properties:
> > +- nand-on-flash-bbt: See nand.txt.
> > +- #address-cells, #size-cells: See partition.txt.
> > +- evatronix,use-bank-select : Use controller bank select function to
Hi Ricard,
On Thu, 2 Jun 2016 09:47:18 +0200
Ricard Wanderlof wrote:
> Devicetree bindings for the driver for the Evatronix NANDFLASH-CTRL NAND flash
> controller IP. This controller is used in the Axis ARTPEC-6 SoC.
>
> The driver supports BCH ECC using the controller's hardware, but there is
Devicetree bindings for the driver for the Evatronix NANDFLASH-CTRL NAND flash
controller IP. This controller is used in the Axis ARTPEC-6 SoC.
The driver supports BCH ECC using the controller's hardware, but there is
also an option to use software BCH ECC. However, the ECC layouts are not
compa
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