On Sat, 2018-01-20 at 13:51 -0800, Steven Noonan wrote:
>
> > +#define X86_FEATURE_STIPBĀ (18*32+27) /* Speculation
> Control with STIPB (Intel) */
>
> Is this correct? I thought the acronym was "STIBP", i.e.
> "Single-Thread Indrect Branch Prediction"? If so, then you've got the
> B
On Sat, 2018-01-20 at 13:51 -0800, Steven Noonan wrote:
>
> > +#define X86_FEATURE_STIPBĀ (18*32+27) /* Speculation
> Control with STIPB (Intel) */
>
> Is this correct? I thought the acronym was "STIBP", i.e.
> "Single-Thread Indrect Branch Prediction"? If so, then you've got the
> B
On Sat, Jan 20, 2018 at 4:03 AM, David Woodhouse wrote:
> Add three feature bits exposed by new microcode on Intel CPUs for
> speculation control. We would now be up to five bits in CPUID(7).RDX
> so take them out of the 'scattered' features and make a proper word
> for them
On Sat, Jan 20, 2018 at 4:03 AM, David Woodhouse wrote:
> Add three feature bits exposed by new microcode on Intel CPUs for
> speculation control. We would now be up to five bits in CPUID(7).RDX
> so take them out of the 'scattered' features and make a proper word
> for them instead.
>
>
On Sat, Jan 20, 2018 at 12:03:30PM +, David Woodhouse wrote:
> Add three feature bits exposed by new microcode on Intel CPUs for
> speculation control. We would now be up to five bits in CPUID(7).RDX
> so take them out of the 'scattered' features and make a proper word
> for them instead.
...
On Sat, Jan 20, 2018 at 12:03:30PM +, David Woodhouse wrote:
> Add three feature bits exposed by new microcode on Intel CPUs for
> speculation control. We would now be up to five bits in CPUID(7).RDX
> so take them out of the 'scattered' features and make a proper word
> for them instead.
...
Add three feature bits exposed by new microcode on Intel CPUs for
speculation control. We would now be up to five bits in CPUID(7).RDX
so take them out of the 'scattered' features and make a proper word
for them instead.
Signed-off-by: David Woodhouse
---
Add three feature bits exposed by new microcode on Intel CPUs for
speculation control. We would now be up to five bits in CPUID(7).RDX
so take them out of the 'scattered' features and make a proper word
for them instead.
Signed-off-by: David Woodhouse
---
arch/x86/include/asm/cpufeature.h
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