- On Apr 23, 2019, at 7:59 AM, Ramana Radhakrishnan
ramana@googlemail.com wrote:
> On Tue, Apr 23, 2019 at 12:16 PM Szabolcs Nagy wrote:
>>
>> On 18/04/2019 19:17, Mathieu Desnoyers wrote:
>> > - On Apr 18, 2019, at 1:37 PM, Szabolcs Nagy szabolcs.n...@arm.com
>> > wrote:
>> >> you
On Tue, Apr 23, 2019 at 12:16 PM Szabolcs Nagy wrote:
>
> On 18/04/2019 19:17, Mathieu Desnoyers wrote:
> > - On Apr 18, 2019, at 1:37 PM, Szabolcs Nagy szabolcs.n...@arm.com
> > wrote:
> >> you have to add a documentation comment somewhere
> >> explaining if RSEQ_SIG is the value that's pass
On 18/04/2019 19:17, Mathieu Desnoyers wrote:
> - On Apr 18, 2019, at 1:37 PM, Szabolcs Nagy szabolcs.n...@arm.com wrote:
>> you have to add a documentation comment somewhere
>> explaining if RSEQ_SIG is the value that's passed to
>> the kernel and then aarch64 asm code has to use
>>
>> .inst e
- On Apr 18, 2019, at 1:37 PM, Szabolcs Nagy szabolcs.n...@arm.com wrote:
> On 18/04/2019 18:10, Mathieu Desnoyers wrote:
>>
>> - On Apr 18, 2019, at 12:07 PM, Szabolcs Nagy szabolcs.n...@arm.com
>> wrote:
>>
>>> On 18/04/2019 16:41, Mathieu Desnoyers wrote:
- On Apr 18, 2019,
On 18/04/2019 18:10, Mathieu Desnoyers wrote:
>
> - On Apr 18, 2019, at 12:07 PM, Szabolcs Nagy szabolcs.n...@arm.com wrote:
>
>> On 18/04/2019 16:41, Mathieu Desnoyers wrote:
>>> - On Apr 18, 2019, at 11:33 AM, Szabolcs Nagy szabolcs.n...@arm.com
>>> wrote:
>>>
On 18/04/2019 14:17,
- On Apr 18, 2019, at 12:07 PM, Szabolcs Nagy szabolcs.n...@arm.com wrote:
> On 18/04/2019 16:41, Mathieu Desnoyers wrote:
>> - On Apr 18, 2019, at 11:33 AM, Szabolcs Nagy szabolcs.n...@arm.com
>> wrote:
>>
>>> On 18/04/2019 14:17, Mathieu Desnoyers wrote:
- On Apr 17, 2019, a
On 18/04/2019 16:41, Mathieu Desnoyers wrote:
> - On Apr 18, 2019, at 11:33 AM, Szabolcs Nagy szabolcs.n...@arm.com wrote:
>
>> On 18/04/2019 14:17, Mathieu Desnoyers wrote:
>>> - On Apr 17, 2019, at 3:56 PM, Mathieu Desnoyers
>>> mathieu.desnoy...@efficios.com wrote:
- On Apr 17,
- On Apr 18, 2019, at 11:33 AM, Szabolcs Nagy szabolcs.n...@arm.com wrote:
> On 18/04/2019 14:17, Mathieu Desnoyers wrote:
>> - On Apr 17, 2019, at 3:56 PM, Mathieu Desnoyers
>> mathieu.desnoy...@efficios.com wrote:
>>> - On Apr 17, 2019, at 12:17 PM, Joseph Myers jos...@codesourcery.c
- On Apr 18, 2019, at 10:48 AM, Joseph Myers jos...@codesourcery.com wrote:
> On Thu, 18 Apr 2019, Mathieu Desnoyers wrote:
>
>> The approach above should work for arm32 be8 vs be32 linker weirdness.
>>
>> For aarch64, I think we can simply do:
>>
>> /*
>> * aarch64 -mbig-endian generates
On 18/04/2019 14:17, Mathieu Desnoyers wrote:
> - On Apr 17, 2019, at 3:56 PM, Mathieu Desnoyers
> mathieu.desnoy...@efficios.com wrote:
>> - On Apr 17, 2019, at 12:17 PM, Joseph Myers jos...@codesourcery.com
>> wrote:
>>> On Wed, 17 Apr 2019, Mathieu Desnoyers wrote:
>>>
> +/* RSEQ_S
On Thu, 18 Apr 2019, Mathieu Desnoyers wrote:
> The approach above should work for arm32 be8 vs be32 linker weirdness.
>
> For aarch64, I think we can simply do:
>
> /*
> * aarch64 -mbig-endian generates mixed endianness code vs data:
> * little-endian code and big-endian data. Ensure the RSEQ
- On Apr 17, 2019, at 3:56 PM, Mathieu Desnoyers
mathieu.desnoy...@efficios.com wrote:
> - On Apr 17, 2019, at 12:17 PM, Joseph Myers jos...@codesourcery.com
> wrote:
>
>> On Wed, 17 Apr 2019, Mathieu Desnoyers wrote:
>>
>>> > +/* RSEQ_SIG is a signature required before each abort hand
- On Apr 17, 2019, at 12:17 PM, Joseph Myers jos...@codesourcery.com wrote:
> On Wed, 17 Apr 2019, Mathieu Desnoyers wrote:
>
>> > +/* RSEQ_SIG is a signature required before each abort handler code.
>> > +
>> > + It is a 32-bit value that maps to actual architecture code compiled
>> > +
On Wed, 17 Apr 2019, Mathieu Desnoyers wrote:
> > +/* RSEQ_SIG is a signature required before each abort handler code.
> > +
> > + It is a 32-bit value that maps to actual architecture code compiled
> > + into applications and libraries. It needs to be defined for each
> > + architecture. Wh
- On Apr 16, 2019, at 1:32 PM, Mathieu Desnoyers
mathieu.desnoy...@efficios.com wrote:
[...]
> diff --git a/sysdeps/unix/sysv/linux/aarch64/bits/rseq.h
> b/sysdeps/unix/sysv/linux/aarch64/bits/rseq.h
> new file mode 100644
> index 00..b02471a89a
> --- /dev/null
> +++ b/sysdeps/unix/sy
Register rseq(2) TLS for each thread (including main), and unregister
for each thread (excluding main). "rseq" stands for Restartable
Sequences.
See the rseq(2) man page proposed here:
https://lkml.org/lkml/2018/9/19/647
This patch is based on glibc-2.29. The rseq(2) system call was merged
into
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