Re: [PATCH 1/7] clk: tegra: fix pll_a1 iddq register, add pll_a1

2017-02-22 Thread Mikko Perttunen
Reviewed-by: Mikko Perttunen On 02/22/2017 05:13 PM, Peter De Schrijver wrote: pll_a1 was using CLK_RST_CONTROLLER_PLLA1_MISC_0 for IDDQ control rather than the correct register CLK_RST_CONTROLLER_PLLA1_MISC_1. Also add pll_a1 to the set of clocks defined for Tegra210.

Re: [PATCH 1/7] clk: tegra: fix pll_a1 iddq register, add pll_a1

2017-02-22 Thread Mikko Perttunen
Reviewed-by: Mikko Perttunen On 02/22/2017 05:13 PM, Peter De Schrijver wrote: pll_a1 was using CLK_RST_CONTROLLER_PLLA1_MISC_0 for IDDQ control rather than the correct register CLK_RST_CONTROLLER_PLLA1_MISC_1. Also add pll_a1 to the set of clocks defined for Tegra210. Signed-off-by: Peter De

[PATCH 1/7] clk: tegra: fix pll_a1 iddq register, add pll_a1

2017-02-22 Thread Peter De Schrijver
pll_a1 was using CLK_RST_CONTROLLER_PLLA1_MISC_0 for IDDQ control rather than the correct register CLK_RST_CONTROLLER_PLLA1_MISC_1. Also add pll_a1 to the set of clocks defined for Tegra210. Signed-off-by: Peter De Schrijver --- drivers/clk/tegra/clk-tegra210.c | 3 ++-

[PATCH 1/7] clk: tegra: fix pll_a1 iddq register, add pll_a1

2017-02-22 Thread Peter De Schrijver
pll_a1 was using CLK_RST_CONTROLLER_PLLA1_MISC_0 for IDDQ control rather than the correct register CLK_RST_CONTROLLER_PLLA1_MISC_1. Also add pll_a1 to the set of clocks defined for Tegra210. Signed-off-by: Peter De Schrijver --- drivers/clk/tegra/clk-tegra210.c | 3 ++- 1 file changed, 2