On 01/05/2018 07:14 AM, Tom Lendacky wrote:
> On 1/5/2018 5:14 AM, David Woodhouse wrote:
>> On Thu, 2018-01-04 at 09:56 -0800, Tim Chen wrote:
>>> cpuid ax=0x7, return rdx bit 26 to indicate presence of this feature
>>> IA32_SPEC_CTRL (0x48) and IA32_PRED_CMD (0x49)
>>> IA32_SPEC_CTRL, bit0 – Indi
On 1/5/2018 5:14 AM, David Woodhouse wrote:
> On Thu, 2018-01-04 at 09:56 -0800, Tim Chen wrote:
>> cpuid ax=0x7, return rdx bit 26 to indicate presence of this feature
>> IA32_SPEC_CTRL (0x48) and IA32_PRED_CMD (0x49)
>> IA32_SPEC_CTRL, bit0 – Indirect Branch Restricted Speculation (IBRS)
>> IA32_
On Fri, 5 Jan 2018, Andrea Arcangeli wrote:
> On Fri, Jan 05, 2018 at 02:09:43PM +0100, Thomas Gleixner wrote:
> Now about the late microcode my preference is not for static_cpu_has
> and forcing the early microcode, but my long term preference is to
> start with this/boot_cpu_has() and then turn s
On Fri, Jan 05, 2018 at 02:09:43PM +0100, Thomas Gleixner wrote:
> On Thu, 4 Jan 2018, Tim Chen wrote:
> > +#define MSR_IA32_SPEC_CTRL 0x0048
> > +#define SPEC_CTRL_FEATURE_DISABLE_IBRS (0 << 0)
> > +#define SPEC_CTRL_FEATURE_ENABLE_IBRS (1 << 0)
> > +
> > +#define MSR_IA32_PRE
On Thu, 4 Jan 2018, Tim Chen wrote:
> +#define MSR_IA32_SPEC_CTRL 0x0048
> +#define SPEC_CTRL_FEATURE_DISABLE_IBRS (0 << 0)
> +#define SPEC_CTRL_FEATURE_ENABLE_IBRS(1 << 0)
> +
> +#define MSR_IA32_PRED_CMD0x0049
> +
> #define MSR_IA32_PERFCTR0
On Thu, 2018-01-04 at 09:56 -0800, Tim Chen wrote:
> cpuid ax=0x7, return rdx bit 26 to indicate presence of this feature
> IA32_SPEC_CTRL (0x48) and IA32_PRED_CMD (0x49)
> IA32_SPEC_CTRL, bit0 – Indirect Branch Restricted Speculation (IBRS)
> IA32_PRED_CMD, bit0 – Indirect Branch Prediction Barri
On 01/04/2018 11:58 AM, Greg KH wrote:
> On Thu, Jan 04, 2018 at 09:56:42AM -0800, Tim Chen wrote:
>> cpuid ax=0x7, return rdx bit 26 to indicate presence of this feature
>> IA32_SPEC_CTRL (0x48) and IA32_PRED_CMD (0x49)
>> IA32_SPEC_CTRL, bit0 – Indirect Branch Restricted Speculation (IBRS)
>> IA3
On Thu, Jan 04, 2018 at 09:56:42AM -0800, Tim Chen wrote:
> cpuid ax=0x7, return rdx bit 26 to indicate presence of this feature
> IA32_SPEC_CTRL (0x48) and IA32_PRED_CMD (0x49)
> IA32_SPEC_CTRL, bit0 – Indirect Branch Restricted Speculation (IBRS)
> IA32_PRED_CMD, bit0 – Indirect Branch Predictio
cpuid ax=0x7, return rdx bit 26 to indicate presence of this feature
IA32_SPEC_CTRL (0x48) and IA32_PRED_CMD (0x49)
IA32_SPEC_CTRL, bit0 – Indirect Branch Restricted Speculation (IBRS)
IA32_PRED_CMD, bit0 – Indirect Branch Prediction Barrier (IBPB)
If IBRS is set, near returns and near indirect j
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