When SDMA channel0 timeouts, even it's disabled in error path,
but sometimes we still see its interrupt bit be asserted,
which causes irq routine be triggered continuously because
no one else clears this bit.
This commit clears channel0 interrupt as well in irq routine,
so that even channel0 timeo
When SDMA channel0 timeouts, even it's disabled in error path,
but sometimes we still see its interrupt bit be asserted,
which causes irq routine be triggered continuously because
no one else clears this bit.
This commit clears channel0 interrupt as well in irq routine,
so that even channel0 timeo
When SDMA channel0 timeouts, even it's disabled in error path,
but sometimes we still see its interrupt bit be asserted,
which causes irq routine be triggered continuously because
no one else clears this bit.
This commit clears channel0 interrupt as well in irq routine,
so that even channel0 timeo
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