On Wed, 2020-10-28 at 11:27 +0100, Fabien Parent wrote:
> Hi Weiyi,
>
> The clock driver for MT8167 has been merged in v5.10-rc1. Can you also
> apply the change to that driver.
> Thank you
>
> Fabien
>
Hi Fabien,
Done. update in v2.
Many thanks.
> On Fri, Oct 23, 2020 at 2:44 AM Weiyi Lu wr
Hi Weiyi,
The clock driver for MT8167 has been merged in v5.10-rc1. Can you also
apply the change to that driver.
Thank you
Fabien
On Fri, Oct 23, 2020 at 2:44 AM Weiyi Lu wrote:
>
> remove pll_en_bit(bit0) from en_mask to make en_mask a pure en_mask
> that only used for pll dividers.
>
> Signe
remove pll_en_bit(bit0) from en_mask to make en_mask a pure en_mask
that only used for pll dividers.
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/clk-mt8183.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt8183.c
b/dri
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