From: Ravi Kumar Bokka <rbo...@codeaurora.org>
On some systems it's possible to actually blow the fuses in the qfprom
from the kernel. Add properties to support that.
NOTE: Whether this is possible depends on the BIOS settings and
whether the kernel has permissions here, so not all boards will be
able to blow fuses in the kernel.
Signed-off-by: Ravi Kumar Bokka <rbo...@codeaurora.org>
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Reviewed-by: Rob Herring <r...@kernel.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandaga...@linaro.org>
---
.../bindings/nvmem/qcom,qfprom.yaml | 50 ++++++++++++++++++-
1 file changed, 48 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml
b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml
index 39f97c1c83a4..d10a0cf91ba7 100644
--- a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml
+++ b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml
@@ -17,8 +17,27 @@ properties:
const: qcom,qfprom
reg:
- items:
- - description: The corrected region.
+ # If the QFPROM is read-only OS image then only the corrected region
+ # needs to be provided. If the QFPROM is writable then all 4 regions
+ # must be provided.
+ oneOf:
+ - items:
+ - description: The corrected region.
+ - items:
+ - description: The corrected region.
+ - description: The raw region.
+ - description: The config region.
+ - description: The security control region.
+
+ # Clock must be provided if QFPROM is writable from the OS image.
+ clocks:
+ maxItems: 1
+ clock-names:
+ const: core
+
+ # Supply reference must be provided if QFPROM is writable from the OS image.
+ vcc-supply:
+ description: Our power supply.
# Needed if any child nodes are present.
"#address-cells":
@@ -31,6 +50,33 @@ required:
- reg
examples:
+ - |
+ #include <dt-bindings/clock/qcom,gcc-sc7180.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ efuse@784000 {
+ compatible = "qcom,qfprom";
+ reg = <0 0x00784000 0 0x8ff>,
+ <0 0x00780000 0 0x7a0>,
+ <0 0x00782000 0 0x100>,
+ <0 0x00786000 0 0x1fff>;
+ clocks = <&gcc GCC_SEC_CTRL_CLK_SRC>;
+ clock-names = "core";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ vcc-supply = <&vreg_l11a_1p8>;
+
+ hstx-trim-primary@25b {
+ reg = <0x25b 0x1>;
+ bits = <1 3>;
+ };
+ };
+ };
+
- |
soc {
#address-cells = <2>;
--
2.21.0
