Re: [PATCH 11/16] net: phy: adin: PHY reset mechanisms

On Mon, 2019-08-05 at 17:15 +0200, Andrew Lunn wrote: > [External] > > On Mon, Aug 05, 2019 at 07:54:48PM +0300, Alexandru Ardelean wrote: > > The ADIN PHYs supports 4 types of reset: > > 1. The standard PHY reset via BMCR_RESET bit in MII_BMCR reg > > 2. Reset via GPIO > > 3. Reset via reg GeSftR

Re: [PATCH 11/16] net: phy: adin: PHY reset mechanisms

On Mon, Aug 05, 2019 at 07:54:48PM +0300, Alexandru Ardelean wrote: > The ADIN PHYs supports 4 types of reset: > 1. The standard PHY reset via BMCR_RESET bit in MII_BMCR reg > 2. Reset via GPIO > 3. Reset via reg GeSftRst (0xff0c) & reload previous pin configs > 4. Reset via reg GeSftRst (0xff0c) &

[PATCH 11/16] net: phy: adin: PHY reset mechanisms

The ADIN PHYs supports 4 types of reset: 1. The standard PHY reset via BMCR_RESET bit in MII_BMCR reg 2. Reset via GPIO 3. Reset via reg GeSftRst (0xff0c) & reload previous pin configs 4. Reset via reg GeSftRst (0xff0c) & request new pin configs Resets 2 & 4 are almost identical, with the exceptio