Re: [PATCH 12/16] gpu: ipu-v3: Fix CSI0 blur in NTSC format

2016-07-19 Thread Steve Longerbeam
On 07/19/2016 06:32 AM, Philipp Zabel wrote: > Am Samstag, den 16.07.2016, 13:24 -0700 schrieb Steve Longerbeam: > [...] >>> Hmm, do you mean define something like a V4L2_MBUS_BT656_NEWAVMODE, >>> and then add a new "newavmode" boolean DT binding parsed by >>> v4l2_of_parse_endpoint()? >>> >>> I do

Re: [PATCH 12/16] gpu: ipu-v3: Fix CSI0 blur in NTSC format

2016-07-19 Thread Philipp Zabel
Am Samstag, den 16.07.2016, 13:24 -0700 schrieb Steve Longerbeam: [...] > > Hmm, do you mean define something like a V4L2_MBUS_BT656_NEWAVMODE, > > and then add a new "newavmode" boolean DT binding parsed by > > v4l2_of_parse_endpoint()? > > > > I don't know if that would make sense given that this

Re: [PATCH 12/16] gpu: ipu-v3: Fix CSI0 blur in NTSC format

2016-07-16 Thread Steve Longerbeam
On 07/15/2016 04:09 PM, Steve Longerbeam wrote: On 07/15/2016 05:58 AM, Philipp Zabel wrote: Am Mittwoch, den 13.07.2016, 16:02 -0700 schrieb Steve Longerbeam: On 07/10/2016 09:33 AM, Steve Longerbeam wrote: On 07/08/2016 10:34 AM, Philipp Zabel wrote: Am Donnerstag, den 07.07.2016, 16:0

Re: [PATCH 12/16] gpu: ipu-v3: Fix CSI0 blur in NTSC format

2016-07-15 Thread Steve Longerbeam
On 07/15/2016 05:58 AM, Philipp Zabel wrote: Am Mittwoch, den 13.07.2016, 16:02 -0700 schrieb Steve Longerbeam: On 07/10/2016 09:33 AM, Steve Longerbeam wrote: On 07/08/2016 10:34 AM, Philipp Zabel wrote: Am Donnerstag, den 07.07.2016, 16:03 -0700 schrieb Steve Longerbeam: From: Suresh Dha

Re: [PATCH 12/16] gpu: ipu-v3: Fix CSI0 blur in NTSC format

2016-07-15 Thread Philipp Zabel
Am Mittwoch, den 13.07.2016, 16:02 -0700 schrieb Steve Longerbeam: > On 07/10/2016 09:33 AM, Steve Longerbeam wrote: > > > > > > On 07/08/2016 10:34 AM, Philipp Zabel wrote: > >> Am Donnerstag, den 07.07.2016, 16:03 -0700 schrieb Steve Longerbeam: > >>> From: Suresh Dhandapani > >>> > >>> This pat

Re: [PATCH 12/16] gpu: ipu-v3: Fix CSI0 blur in NTSC format

2016-07-13 Thread Steve Longerbeam
On 07/10/2016 09:33 AM, Steve Longerbeam wrote: > > > On 07/08/2016 10:34 AM, Philipp Zabel wrote: >> Am Donnerstag, den 07.07.2016, 16:03 -0700 schrieb Steve Longerbeam: >>> From: Suresh Dhandapani >>> >>> This patch will change the register IPU_CSI0_CCIR_CODE_2 value from >>> 0x40596 to 0x405A6.

Re: [PATCH 12/16] gpu: ipu-v3: Fix CSI0 blur in NTSC format

2016-07-10 Thread Steve Longerbeam
On 07/08/2016 10:34 AM, Philipp Zabel wrote: Am Donnerstag, den 07.07.2016, 16:03 -0700 schrieb Steve Longerbeam: From: Suresh Dhandapani This patch will change the register IPU_CSI0_CCIR_CODE_2 value from 0x40596 to 0x405A6. The change is related to the Start of field 1 first blanking line

Re: [PATCH 12/16] gpu: ipu-v3: Fix CSI0 blur in NTSC format

2016-07-08 Thread Philipp Zabel
Am Donnerstag, den 07.07.2016, 16:03 -0700 schrieb Steve Longerbeam: > From: Suresh Dhandapani > > This patch will change the register IPU_CSI0_CCIR_CODE_2 value from > 0x40596 to 0x405A6. The change is related to the Start of field 1 > first blanking line command bit[5-3] for NTSC format only. T

[PATCH 12/16] gpu: ipu-v3: Fix CSI0 blur in NTSC format

2016-07-07 Thread Steve Longerbeam
From: Suresh Dhandapani This patch will change the register IPU_CSI0_CCIR_CODE_2 value from 0x40596 to 0x405A6. The change is related to the Start of field 1 first blanking line command bit[5-3] for NTSC format only. This change is dependent with ADV chip where the NEWAVMODE is set to 0 in regist