Re: [PATCH 17/17] riscv: add nommu support

2019-07-12 Thread Vladimir Murzin
Hi Christoph, On 6/24/19 6:43 AM, Christoph Hellwig wrote: > The kernel runs in M-mode without using page tables, and thus can't run > bare metal without help from additional firmware. > > Most of the patch is just stubbing out code not needed without page > tables, but there is an interesting de

[PATCH 17/17] riscv: add nommu support

2019-06-23 Thread Christoph Hellwig
The kernel runs in M-mode without using page tables, and thus can't run bare metal without help from additional firmware. Most of the patch is just stubbing out code not needed without page tables, but there is an interesting detail in the signals implementation: - The normal RISC-V syscall ABI

Re: [PATCH 17/17] riscv: add nommu support

2019-06-11 Thread David Hildenbrand
On 11.06.19 00:16, Christoph Hellwig wrote: > The kernel runs in M-mode without using page tables, and thus doesn't > can run bare metal without help from additional firmware. s/doesn't can/can't/ > > Most of the patch is just stubbing out code not needed without page > tables, but there is an i

Re: [PATCH 17/17] riscv: add nommu support

2019-06-11 Thread Vladimir Murzin
On 6/10/19 11:16 PM, Christoph Hellwig wrote: > Most of the patch is just stubbing out code not needed without page > tables, but there is an interesting detail in the signals implementation: > > - The normal RISC-V syscall ABI only implements rt_sigreturn as VDSO >entry point, but the ELF VD

[PATCH 17/17] riscv: add nommu support

2019-06-10 Thread Christoph Hellwig
The kernel runs in M-mode without using page tables, and thus doesn't can run bare metal without help from additional firmware. Most of the patch is just stubbing out code not needed without page tables, but there is an interesting detail in the signals implementation: - The normal RISC-V syscal