Re: [PATCH 2/2] KVM: X86: Fix loss of CR3_PCID_INVD bit when guest writes CR3

On 13/05/2018 05:24, Wanpeng Li wrote: > From: Wanpeng Li > > SDM volume 3, section 4.10.4: > > * MOV to CR3. The behavior of the instruction depends on the value of > CR4.PCIDE: > — If CR4.PCIDE = 1 and bit 63 of the instruction’s source operand is 1, the > instruction is not required to in

Re: [PATCH 2/2] KVM: X86: Fix loss of CR3_PCID_INVD bit when guest writes CR3

2018-05-13 16:03 GMT+08:00 Liran Alon : > > - kernel...@gmail.com wrote: > >> From: Wanpeng Li >> >> SDM volume 3, section 4.10.4: >> >> * MOV to CR3. The behavior of the instruction depends on the value of >> CR4.PCIDE: >> — If CR4.PCIDE = 1 and bit 63 of the instruction’s source operand is >

Re: [PATCH 2/2] KVM: X86: Fix loss of CR3_PCID_INVD bit when guest writes CR3

- kernel...@gmail.com wrote: > From: Wanpeng Li > > SDM volume 3, section 4.10.4: > > * MOV to CR3. The behavior of the instruction depends on the value of > CR4.PCIDE: > — If CR4.PCIDE = 1 and bit 63 of the instruction’s source operand is > 1, the > instruction is not required to inval

[PATCH 2/2] KVM: X86: Fix loss of CR3_PCID_INVD bit when guest writes CR3

From: Wanpeng Li SDM volume 3, section 4.10.4: * MOV to CR3. The behavior of the instruction depends on the value of CR4.PCIDE: — If CR4.PCIDE = 1 and bit 63 of the instruction’s source operand is 1, the instruction is not required to invalidate any TLB entries or entries in paging-structu