Re: [PATCH 2/2] arm-cci: CoreLink CCI-550 PMU driver

"Suzuki K. Poulose" writes: > Add ARM CoreLink CCI-550 cache coherent interconnect PMU > driver support. The CCI-550 PMU shares all the attributes of CCI-500 > PMU, except for an additional master interface (MI-6 - 0xe). > CCI-550 requires the same work around as for CCI-500 to > write to the

Re: [PATCH 2/2] arm-cci: CoreLink CCI-550 PMU driver

"Suzuki K. Poulose" writes: > Add ARM CoreLink CCI-550 cache coherent interconnect PMU > driver support. The CCI-550 PMU shares all the attributes of CCI-500 > PMU, except for an additional master interface (MI-6 - 0xe). > CCI-550 requires the same work around as for

Re: [PATCH 2/2] arm-cci: CoreLink CCI-550 PMU driver

On Tue, Nov 17, 2015 at 06:30:40PM +, Suzuki K. Poulose wrote: > Add ARM CoreLink CCI-550 cache coherent interconnect PMU > driver support. The CCI-550 PMU shares all the attributes of CCI-500 > PMU, except for an additional master interface (MI-6 - 0xe). > CCI-550 requires the same work

Re: [PATCH 2/2] arm-cci: CoreLink CCI-550 PMU driver

On Tue, Nov 17, 2015 at 06:30:40PM +, Suzuki K. Poulose wrote: > Add ARM CoreLink CCI-550 cache coherent interconnect PMU > driver support. The CCI-550 PMU shares all the attributes of CCI-500 > PMU, except for an additional master interface (MI-6 - 0xe). > CCI-550 requires the same work

[PATCH 2/2] arm-cci: CoreLink CCI-550 PMU driver

Add ARM CoreLink CCI-550 cache coherent interconnect PMU driver support. The CCI-550 PMU shares all the attributes of CCI-500 PMU, except for an additional master interface (MI-6 - 0xe). CCI-550 requires the same work around as for CCI-500 to write to the PMU counter. Cc: Punit Agrawal Cc: Mark

[PATCH 2/2] arm-cci: CoreLink CCI-550 PMU driver

Add ARM CoreLink CCI-550 cache coherent interconnect PMU driver support. The CCI-550 PMU shares all the attributes of CCI-500 PMU, except for an additional master interface (MI-6 - 0xe). CCI-550 requires the same work around as for CCI-500 to write to the PMU counter. Cc: Punit Agrawal